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			The armv7m systick timer is a 24-bit decrementing, wrap-on-zero, clear-on-write counter. Our current implementation has various bugs and dubious workarounds in it (for instance see https://bugs.launchpad.net/qemu/+bug/1872237). We have an implementation of a simple decrementing counter and we put a lot of effort into making sure it handles the interesting corner cases (like "spend a cycle at 0 before reloading") -- ptimer. Rewrite the systick timer to use a ptimer rather than a raw QEMU timer. Unfortunately this is a migration compatibility break, which will affect all M-profile boards. Among other bugs, this fixes https://bugs.launchpad.net/qemu/+bug/1872237 : now writes to SYST_CVR when the timer is enabled correctly do nothing; when the timer is enabled via SYST_CSR.ENABLE, the ptimer code will (because of POLICY_NO_IMMEDIATE_RELOAD) arrange that after one timer tick the counter is reloaded from SYST_RVR and then counts down from there, as the architecture requires. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201015151829.14656-3-peter.maydell@linaro.org
		
			
				
	
	
		
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			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			59 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * ARMv7M SysTick timer
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|  *
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|  * Copyright (c) 2006-2007 CodeSourcery.
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|  * Written by Paul Brook
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|  * Copyright (c) 2017 Linaro Ltd
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|  * Written by Peter Maydell
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|  *
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|  * This code is licensed under the GPL (version 2 or later).
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|  */
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| 
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| #ifndef HW_TIMER_ARMV7M_SYSTICK_H
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| #define HW_TIMER_ARMV7M_SYSTICK_H
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| 
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| #include "hw/sysbus.h"
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| #include "qom/object.h"
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| #include "hw/ptimer.h"
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| 
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| #define TYPE_SYSTICK "armv7m_systick"
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| 
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| OBJECT_DECLARE_SIMPLE_TYPE(SysTickState, SYSTICK)
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| 
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| struct SysTickState {
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|     /*< private >*/
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|     SysBusDevice parent_obj;
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|     /*< public >*/
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| 
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|     uint32_t control;
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|     uint32_t reload;
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|     int64_t tick;
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|     ptimer_state *ptimer;
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|     MemoryRegion iomem;
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|     qemu_irq irq;
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| };
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| 
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| /*
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|  * Multiplication factor to convert from system clock ticks to qemu timer
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|  * ticks. This should be set (by board code, usually) to a value
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|  * equal to NANOSECONDS_PER_SECOND / frq, where frq is the clock frequency
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|  * in Hz of the CPU.
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|  *
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|  * This value is used by the systick device when it is running in
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|  * its "use the CPU clock" mode (ie when SYST_CSR.CLKSOURCE == 1) to
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|  * set how fast the timer should tick.
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|  *
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|  * TODO: we should refactor this so that rather than using a global
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|  * we use a device property or something similar. This is complicated
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|  * because (a) the property would need to be plumbed through from the
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|  * board code down through various layers to the systick device
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|  * and (b) the property needs to be modifiable after realize, because
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|  * the stellaris board uses this to implement the behaviour where the
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|  * guest can reprogram the PLL registers to downclock the CPU, and the
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|  * systick device needs to react accordingly. Possibly this should
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|  * be deferred until we have a good API for modelling clock trees.
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|  */
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| extern int system_clock_scale;
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| 
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| #endif
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