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Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
103 lines
2.9 KiB
C
103 lines
2.9 KiB
C
/*
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* STM32F2XX Timer
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*
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* Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_STM32F2XX_TIMER_H
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#define HW_STM32F2XX_TIMER_H
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#include "hw/sysbus.h"
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#include "qemu/timer.h"
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#include "qom/object.h"
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#define TIM_CR1 0x00
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#define TIM_CR2 0x04
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#define TIM_SMCR 0x08
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#define TIM_DIER 0x0C
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#define TIM_SR 0x10
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#define TIM_EGR 0x14
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#define TIM_CCMR1 0x18
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#define TIM_CCMR2 0x1C
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#define TIM_CCER 0x20
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#define TIM_CNT 0x24
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#define TIM_PSC 0x28
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#define TIM_ARR 0x2C
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#define TIM_CCR1 0x34
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#define TIM_CCR2 0x38
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#define TIM_CCR3 0x3C
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#define TIM_CCR4 0x40
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#define TIM_DCR 0x48
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#define TIM_DMAR 0x4C
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#define TIM_OR 0x50
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#define TIM_CR1_CEN 1
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#define TIM_EGR_UG 1
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#define TIM_CCER_CC2E (1 << 4)
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#define TIM_CCMR1_OC2M2 (1 << 14)
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#define TIM_CCMR1_OC2M1 (1 << 13)
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#define TIM_CCMR1_OC2M0 (1 << 12)
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#define TIM_CCMR1_OC2PE (1 << 11)
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#define TIM_DIER_UIE 1
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#define TYPE_STM32F2XX_TIMER "stm32f2xx-timer"
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typedef struct STM32F2XXTimerState STM32F2XXTimerState;
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DECLARE_INSTANCE_CHECKER(STM32F2XXTimerState, STM32F2XXTIMER,
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TYPE_STM32F2XX_TIMER)
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struct STM32F2XXTimerState {
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/* <private> */
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SysBusDevice parent_obj;
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/* <public> */
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MemoryRegion iomem;
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QEMUTimer *timer;
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qemu_irq irq;
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int64_t tick_offset;
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uint64_t hit_time;
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uint64_t freq_hz;
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uint32_t tim_cr1;
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uint32_t tim_cr2;
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uint32_t tim_smcr;
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uint32_t tim_dier;
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uint32_t tim_sr;
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uint32_t tim_egr;
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uint32_t tim_ccmr1;
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uint32_t tim_ccmr2;
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uint32_t tim_ccer;
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uint32_t tim_psc;
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uint32_t tim_arr;
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uint32_t tim_ccr1;
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uint32_t tim_ccr2;
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uint32_t tim_ccr3;
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uint32_t tim_ccr4;
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uint32_t tim_dcr;
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uint32_t tim_dmar;
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uint32_t tim_or;
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};
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#endif /* HW_STM32F2XX_TIMER_H */
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