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22cd0945b8
Add a model of the generic DMA found on Xilinx ZynqMP. Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20180503214201.29082-2-frasse.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
85 lines
2.3 KiB
C
85 lines
2.3 KiB
C
/*
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* QEMU model of the ZynqMP generic DMA
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*
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* Copyright (c) 2014 Xilinx Inc.
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* Copyright (c) 2018 FEIMTECH AB
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*
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* Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>,
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* Francisco Iglesias <francisco.iglesias@feimtech.se>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef XLNX_ZDMA_H
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#define XLNX_ZDMA_H
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#include "hw/sysbus.h"
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#include "hw/register.h"
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#include "sysemu/dma.h"
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#define ZDMA_R_MAX (0x204 / 4)
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typedef enum {
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DISABLED = 0,
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ENABLED = 1,
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PAUSED = 2,
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} XlnxZDMAState;
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typedef union {
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struct {
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uint64_t addr;
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uint32_t size;
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uint32_t attr;
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};
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uint32_t words[4];
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} XlnxZDMADescr;
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typedef struct XlnxZDMA {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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MemTxAttrs attr;
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MemoryRegion *dma_mr;
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AddressSpace *dma_as;
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qemu_irq irq_zdma_ch_imr;
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struct {
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uint32_t bus_width;
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} cfg;
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XlnxZDMAState state;
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bool error;
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XlnxZDMADescr dsc_src;
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XlnxZDMADescr dsc_dst;
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uint32_t regs[ZDMA_R_MAX];
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RegisterInfo regs_info[ZDMA_R_MAX];
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/* We don't model the common bufs. Must be at least 16 bytes
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to model write only mode. */
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uint8_t buf[2048];
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} XlnxZDMA;
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#define TYPE_XLNX_ZDMA "xlnx.zdma"
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#define XLNX_ZDMA(obj) \
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OBJECT_CHECK(XlnxZDMA, (obj), TYPE_XLNX_ZDMA)
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#endif /* XLNX_ZDMA_H */
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