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Today, the ICPState array of the sPAPR machine is indexed with 'cpu_index' of the CPUState. This numbering of CPUs is internal to QEMU and the guest only knows about what is exposed in the device tree, that is the 'cpu_dt_id'. This is why sPAPR uses the helper xics_get_cpu_index_by_dt_id() to do the mapping in a couple of places. To provide a more generic XICS layer, we need to abstract the IRQ 'server' number and remove any assumption made on its nature. It should not be used as a 'cpu_index' for lookups like xics_cpu_setup() and xics_cpu_destroy() do. To reach that goal, we choose to introduce a generic 'intc' backlink under PowerPCCPU, and let the machine core init routine do the ICPState lookup. The resulting object is passed on to xics_cpu_setup() which does the store under PowerPCCPU. The IRQ 'server' number in XICS is now generic. sPAPR uses 'cpu_dt_id' and PowerNV will use 'PIR' number. This also has the benefit of simplifying the sPAPR hcall routines which do not need to do any ICPState lookups anymore. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
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| .. | ||
| fdt.h | ||
| mac_dbdma.h | ||
| openpic.h | ||
| pnv_core.h | ||
| pnv_lpc.h | ||
| pnv_xscom.h | ||
| pnv.h | ||
| ppc4xx.h | ||
| ppc_e500.h | ||
| ppc.h | ||
| spapr_cpu_core.h | ||
| spapr_drc.h | ||
| spapr_ovec.h | ||
| spapr_rtas.h | ||
| spapr_vio.h | ||
| spapr.h | ||
| xics.h | ||