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668f62ec62
When all we do with an Error we receive into a local variable is
propagating to somewhere else, we can just as well receive it there
right away. Convert
if (!foo(..., &err)) {
...
error_propagate(errp, err);
...
return ...
}
to
if (!foo(..., errp)) {
...
...
return ...
}
where nothing else needs @err. Coccinelle script:
@rule1 forall@
identifier fun, err, errp, lbl;
expression list args, args2;
binary operator op;
constant c1, c2;
symbol false;
@@
if (
(
- fun(args, &err, args2)
+ fun(args, errp, args2)
|
- !fun(args, &err, args2)
+ !fun(args, errp, args2)
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- fun(args, &err, args2) op c1
+ fun(args, errp, args2) op c1
)
)
{
... when != err
when != lbl:
when strict
- error_propagate(errp, err);
... when != err
(
return;
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return c2;
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return false;
)
}
@rule2 forall@
identifier fun, err, errp, lbl;
expression list args, args2;
expression var;
binary operator op;
constant c1, c2;
symbol false;
@@
- var = fun(args, &err, args2);
+ var = fun(args, errp, args2);
... when != err
if (
(
var
|
!var
|
var op c1
)
)
{
... when != err
when != lbl:
when strict
- error_propagate(errp, err);
... when != err
(
return;
|
return c2;
|
return false;
|
return var;
)
}
@depends on rule1 || rule2@
identifier err;
@@
- Error *err = NULL;
... when != err
Not exactly elegant, I'm afraid.
The "when != lbl:" is necessary to avoid transforming
if (fun(args, &err)) {
goto out
}
...
out:
error_propagate(errp, err);
even though other paths to label out still need the error_propagate().
For an actual example, see sclp_realize().
Without the "when strict", Coccinelle transforms vfio_msix_setup(),
incorrectly. I don't know what exactly "when strict" does, only that
it helps here.
The match of return is narrower than what I want, but I can't figure
out how to express "return where the operand doesn't use @err". For
an example where it's too narrow, see vfio_intx_enable().
Silently fails to convert hw/arm/armsse.c, because Coccinelle gets
confused by ARMSSE being used both as typedef and function-like macro
there. Converted manually.
Line breaks tidied up manually. One nested declaration of @local_err
deleted manually. Preexisting unwanted blank line dropped in
hw/riscv/sifive_e.c.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <20200707160613.848843-35-armbru@redhat.com>
138 lines
3.9 KiB
C
138 lines
3.9 KiB
C
/*
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* RealView ARM11MPCore internal peripheral emulation
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*
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* Copyright (c) 2006-2007 CodeSourcery.
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* Copyright (c) 2013 SUSE LINUX Products GmbH
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* Written by Paul Brook and Andreas Färber
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*
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* This code is licensed under the GPL.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "hw/cpu/arm11mpcore.h"
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#include "hw/intc/realview_gic.h"
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#include "hw/irq.h"
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#include "hw/qdev-properties.h"
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#define TYPE_REALVIEW_MPCORE_RIRQ "realview_mpcore"
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#define REALVIEW_MPCORE_RIRQ(obj) \
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OBJECT_CHECK(mpcore_rirq_state, (obj), TYPE_REALVIEW_MPCORE_RIRQ)
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/* Dummy PIC to route IRQ lines. The baseboard has 4 independent IRQ
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controllers. The output of these, plus some of the raw input lines
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are fed into a single SMP-aware interrupt controller on the CPU. */
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typedef struct {
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SysBusDevice parent_obj;
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qemu_irq cpuic[32];
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qemu_irq rvic[4][64];
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uint32_t num_cpu;
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ARM11MPCorePriveState priv;
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RealViewGICState gic[4];
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} mpcore_rirq_state;
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/* Map baseboard IRQs onto CPU IRQ lines. */
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static const int mpcore_irq_map[32] = {
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-1, -1, -1, -1, 1, 2, -1, -1,
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-1, -1, 6, -1, 4, 5, -1, -1,
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-1, 14, 15, 0, 7, 8, -1, -1,
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-1, -1, -1, -1, 9, 3, -1, -1,
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};
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static void mpcore_rirq_set_irq(void *opaque, int irq, int level)
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{
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mpcore_rirq_state *s = (mpcore_rirq_state *)opaque;
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int i;
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for (i = 0; i < 4; i++) {
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qemu_set_irq(s->rvic[i][irq], level);
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}
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if (irq < 32) {
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irq = mpcore_irq_map[irq];
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if (irq >= 0) {
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qemu_set_irq(s->cpuic[irq], level);
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}
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}
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}
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static void realview_mpcore_realize(DeviceState *dev, Error **errp)
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{
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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mpcore_rirq_state *s = REALVIEW_MPCORE_RIRQ(dev);
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DeviceState *priv = DEVICE(&s->priv);
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DeviceState *gic;
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SysBusDevice *gicbusdev;
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int n;
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int i;
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qdev_prop_set_uint32(priv, "num-cpu", s->num_cpu);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->priv), errp)) {
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return;
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}
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sysbus_pass_irq(sbd, SYS_BUS_DEVICE(&s->priv));
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for (i = 0; i < 32; i++) {
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s->cpuic[i] = qdev_get_gpio_in(priv, i);
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}
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/* ??? IRQ routing is hardcoded to "normal" mode. */
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for (n = 0; n < 4; n++) {
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic[n]), errp)) {
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return;
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}
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gic = DEVICE(&s->gic[n]);
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gicbusdev = SYS_BUS_DEVICE(&s->gic[n]);
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sysbus_mmio_map(gicbusdev, 0, 0x10040000 + n * 0x10000);
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sysbus_connect_irq(gicbusdev, 0, s->cpuic[10 + n]);
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for (i = 0; i < 64; i++) {
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s->rvic[n][i] = qdev_get_gpio_in(gic, i);
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}
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}
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qdev_init_gpio_in(dev, mpcore_rirq_set_irq, 64);
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}
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static void mpcore_rirq_init(Object *obj)
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{
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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mpcore_rirq_state *s = REALVIEW_MPCORE_RIRQ(obj);
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SysBusDevice *privbusdev;
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int i;
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object_initialize_child(obj, "a11priv", &s->priv, TYPE_ARM11MPCORE_PRIV);
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privbusdev = SYS_BUS_DEVICE(&s->priv);
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sysbus_init_mmio(sbd, sysbus_mmio_get_region(privbusdev, 0));
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for (i = 0; i < 4; i++) {
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object_initialize_child(obj, "gic[*]", &s->gic[i], TYPE_REALVIEW_GIC);
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}
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}
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static Property mpcore_rirq_properties[] = {
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DEFINE_PROP_UINT32("num-cpu", mpcore_rirq_state, num_cpu, 1),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void mpcore_rirq_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = realview_mpcore_realize;
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device_class_set_props(dc, mpcore_rirq_properties);
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}
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static const TypeInfo mpcore_rirq_info = {
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.name = TYPE_REALVIEW_MPCORE_RIRQ,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(mpcore_rirq_state),
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.instance_init = mpcore_rirq_init,
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.class_init = mpcore_rirq_class_init,
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};
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static void realview_mpcore_register_types(void)
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{
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type_register_static(&mpcore_rirq_info);
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}
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type_init(realview_mpcore_register_types)
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