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This creates a minimum model for Microchip PolarFire SoC SYSREG module. It only implements the ENVM_CR register to tell guest software that eNVM is running at the configured divider rate. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-7-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
40 lines
1.2 KiB
C
40 lines
1.2 KiB
C
/*
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* Microchip PolarFire SoC SYSREG module emulation
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*
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* Copyright (c) 2020 Wind River Systems, Inc.
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*
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* Author:
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* Bin Meng <bin.meng@windriver.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) version 3 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef MCHP_PFSOC_SYSREG_H
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#define MCHP_PFSOC_SYSREG_H
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#define MCHP_PFSOC_SYSREG_REG_SIZE 0x2000
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typedef struct MchpPfSoCSysregState {
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SysBusDevice parent;
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MemoryRegion sysreg;
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} MchpPfSoCSysregState;
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#define TYPE_MCHP_PFSOC_SYSREG "mchp.pfsoc.sysreg"
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#define MCHP_PFSOC_SYSREG(obj) \
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OBJECT_CHECK(MchpPfSoCSysregState, (obj), \
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TYPE_MCHP_PFSOC_SYSREG)
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#endif /* MCHP_PFSOC_SYSREG_H */
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