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Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
38 lines
918 B
C
38 lines
918 B
C
/*
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* ARM SBCon two-wire serial bus interface (I2C bitbang)
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* a.k.a.
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* ARM Versatile I2C controller
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*
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* Copyright (c) 2006-2007 CodeSourcery.
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* Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
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* Copyright (C) 2020 Philippe Mathieu-Daudé <f4bug@amsat.org>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef HW_I2C_ARM_SBCON_H
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#define HW_I2C_ARM_SBCON_H
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#include "hw/sysbus.h"
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#include "hw/i2c/bitbang_i2c.h"
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#include "qom/object.h"
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#define TYPE_VERSATILE_I2C "versatile_i2c"
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#define TYPE_ARM_SBCON_I2C TYPE_VERSATILE_I2C
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typedef struct ArmSbconI2CState ArmSbconI2CState;
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DECLARE_INSTANCE_CHECKER(ArmSbconI2CState, ARM_SBCON_I2C,
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TYPE_ARM_SBCON_I2C)
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struct ArmSbconI2CState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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bitbang_i2c_interface bitbang;
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int out;
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int in;
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};
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#endif /* HW_I2C_ARM_SBCON_H */
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