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cc63a18282
We will be upgrading SiFive CLINT implementation into RISC-V ACLINT implementation so let's first rename the sources. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 20210831110603.338681-2-anup.patel@wdc.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
84 lines
1.5 KiB
Plaintext
84 lines
1.5 KiB
Plaintext
config RISCV_NUMA
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bool
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config IBEX
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bool
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config MICROCHIP_PFSOC
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bool
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select CADENCE_SDHCI
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select MCHP_PFSOC_DMC
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select MCHP_PFSOC_IOSCB
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select MCHP_PFSOC_MMUART
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select MCHP_PFSOC_SYSREG
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select MSI_NONBROKEN
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select RISCV_ACLINT
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select SIFIVE_PDMA
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select SIFIVE_PLIC
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select UNIMP
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config OPENTITAN
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bool
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select IBEX
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select UNIMP
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config SHAKTI_C
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bool
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select UNIMP
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select SHAKTI_UART
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select RISCV_ACLINT
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select SIFIVE_PLIC
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config RISCV_VIRT
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bool
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imply PCI_DEVICES
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imply VIRTIO_VGA
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imply TEST_DEVICES
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select RISCV_NUMA
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select GOLDFISH_RTC
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select MSI_NONBROKEN
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select PCI
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select PCI_EXPRESS_GENERIC_BRIDGE
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select PFLASH_CFI01
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select SERIAL
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select RISCV_ACLINT
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select SIFIVE_PLIC
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select SIFIVE_TEST
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select VIRTIO_MMIO
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select FW_CFG_DMA
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config SIFIVE_E
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bool
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select MSI_NONBROKEN
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select RISCV_ACLINT
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select SIFIVE_GPIO
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select SIFIVE_PLIC
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select SIFIVE_UART
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select SIFIVE_E_PRCI
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select UNIMP
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config SIFIVE_U
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bool
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select CADENCE
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select MSI_NONBROKEN
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select RISCV_ACLINT
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select SIFIVE_GPIO
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select SIFIVE_PDMA
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select SIFIVE_PLIC
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select SIFIVE_SPI
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select SIFIVE_UART
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select SIFIVE_U_OTP
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select SIFIVE_U_PRCI
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select SIFIVE_PWM
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select SSI_M25P80
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select SSI_SD
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select UNIMP
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config SPIKE
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bool
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select RISCV_NUMA
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select HTIF
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select MSI_NONBROKEN
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select RISCV_ACLINT
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select SIFIVE_PLIC
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