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Currently PCI memory (aka MMIO) space is accessed via a set of readb/writeb style accessors. This is what we want for accessing discrete registers of a certain size. However, there are a few cases where we instead need a "bag of bytes" style streaming interface to PCI MMIO space. This can be either for streaming data style registers or when there's actual memory rather than registers in PCI space, for example frame buffers or ivshmem. This patch adds backend callbacks, and libqos wrappers for this type of byte address order preserving accesses. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
109 lines
3.9 KiB
C
109 lines
3.9 KiB
C
/*
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* libqos PCI bindings
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*
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* Copyright IBM, Corp. 2012-2013
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef LIBQOS_PCI_H
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#define LIBQOS_PCI_H
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#include "libqtest.h"
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#define QPCI_PIO_LIMIT 0x10000
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#define QPCI_DEVFN(dev, fn) (((dev) << 3) | (fn))
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typedef struct QPCIDevice QPCIDevice;
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typedef struct QPCIBus QPCIBus;
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struct QPCIBus {
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uint8_t (*pio_readb)(QPCIBus *bus, uint32_t addr);
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uint16_t (*pio_readw)(QPCIBus *bus, uint32_t addr);
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uint32_t (*pio_readl)(QPCIBus *bus, uint32_t addr);
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uint8_t (*mmio_readb)(QPCIBus *bus, uint32_t addr);
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uint16_t (*mmio_readw)(QPCIBus *bus, uint32_t addr);
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uint32_t (*mmio_readl)(QPCIBus *bus, uint32_t addr);
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void (*pio_writeb)(QPCIBus *bus, uint32_t addr, uint8_t value);
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void (*pio_writew)(QPCIBus *bus, uint32_t addr, uint16_t value);
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void (*pio_writel)(QPCIBus *bus, uint32_t addr, uint32_t value);
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void (*mmio_writeb)(QPCIBus *bus, uint32_t addr, uint8_t value);
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void (*mmio_writew)(QPCIBus *bus, uint32_t addr, uint16_t value);
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void (*mmio_writel)(QPCIBus *bus, uint32_t addr, uint32_t value);
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void (*memread)(QPCIBus *bus, uint32_t addr, void *buf, size_t len);
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void (*memwrite)(QPCIBus *bus, uint32_t addr, const void *buf, size_t len);
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uint8_t (*config_readb)(QPCIBus *bus, int devfn, uint8_t offset);
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uint16_t (*config_readw)(QPCIBus *bus, int devfn, uint8_t offset);
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uint32_t (*config_readl)(QPCIBus *bus, int devfn, uint8_t offset);
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void (*config_writeb)(QPCIBus *bus, int devfn,
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uint8_t offset, uint8_t value);
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void (*config_writew)(QPCIBus *bus, int devfn,
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uint8_t offset, uint16_t value);
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void (*config_writel)(QPCIBus *bus, int devfn,
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uint8_t offset, uint32_t value);
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uint16_t pio_alloc_ptr;
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uint64_t mmio_alloc_ptr, mmio_limit;
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};
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struct QPCIDevice
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{
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QPCIBus *bus;
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int devfn;
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bool msix_enabled;
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void *msix_table;
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void *msix_pba;
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};
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void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id,
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void (*func)(QPCIDevice *dev, int devfn, void *data),
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void *data);
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QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn);
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void qpci_device_enable(QPCIDevice *dev);
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uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id);
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void qpci_msix_enable(QPCIDevice *dev);
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void qpci_msix_disable(QPCIDevice *dev);
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bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry);
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bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry);
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uint16_t qpci_msix_table_size(QPCIDevice *dev);
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uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset);
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uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset);
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uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset);
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void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value);
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void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value);
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void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value);
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uint8_t qpci_io_readb(QPCIDevice *dev, void *data);
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uint16_t qpci_io_readw(QPCIDevice *dev, void *data);
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uint32_t qpci_io_readl(QPCIDevice *dev, void *data);
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void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value);
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void qpci_io_writew(QPCIDevice *dev, void *data, uint16_t value);
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void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value);
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void qpci_memread(QPCIDevice *bus, void *data, void *buf, size_t len);
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void qpci_memwrite(QPCIDevice *bus, void *data, const void *buf, size_t len);
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void *qpci_iomap(QPCIDevice *dev, int barno, uint64_t *sizeptr);
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void qpci_iounmap(QPCIDevice *dev, void *data);
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void *qpci_legacy_iomap(QPCIDevice *dev, uint16_t addr);
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void qpci_plug_device_test(const char *driver, const char *id,
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uint8_t slot, const char *opts);
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void qpci_unplug_acpi_device_test(const char *id, uint8_t slot);
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#endif
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