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The only guidance the AHCI specification gives on memory access is: "Register accesses shall have a maximum size of 64-bits; 64-bit access must not cross an 8-byte alignment boundary." I interpret this to mean that aligned or unaligned 1, 2 and 4 byte accesses should work, as well as aligned 8 byte accesses. In practice, a real Q35/ICH9 responds to 1, 2, 4 and 8 byte reads regardless of alignment. Windows 7 can be observed making 1 byte reads to the middle of 32 bit registers to fetch error codes. Introduce a wrapper to support unaligned accesses to AHCI. This wrapper will support aligned 8 byte reads, but will make no effort to support unaligned 8 byte reads, which although they will work on real hardware, are not guaranteed to work and do not appear to be used by either Windows or Linux. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 1434470575-21625-2-git-send-email-jsnow@redhat.com |
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| .. | ||
| ahci.c | ||
| ahci.h | ||
| atapi.c | ||
| cmd646.c | ||
| core.c | ||
| ich.c | ||
| internal.h | ||
| isa.c | ||
| macio.c | ||
| Makefile.objs | ||
| microdrive.c | ||
| mmio.c | ||
| pci.c | ||
| pci.h | ||
| piix.c | ||
| qdev.c | ||
| via.c | ||