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8ac98aedda
... in order to advertise the XEN_HVM_CPUID_UPCALL_VECTOR feature, which will come in a subsequent commit. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Acked-by: Paul Durrant <paul@xen.org>
379 lines
14 KiB
C
379 lines
14 KiB
C
/* SPDX-License-Identifier: MIT */
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/******************************************************************************
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* arch-x86/xen.h
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*
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* Guest OS interface to x86 Xen.
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*
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* Copyright (c) 2004-2006, K A Fraser
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*/
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#include "../xen.h"
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#ifndef __XEN_PUBLIC_ARCH_X86_XEN_H__
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#define __XEN_PUBLIC_ARCH_X86_XEN_H__
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/* Structural guest handles introduced in 0x00030201. */
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#if __XEN_INTERFACE_VERSION__ >= 0x00030201
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#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
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typedef struct { type *p; } __guest_handle_ ## name
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#else
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#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
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typedef type * __guest_handle_ ## name
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#endif
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/*
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* XEN_GUEST_HANDLE represents a guest pointer, when passed as a field
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* in a struct in memory.
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* XEN_GUEST_HANDLE_PARAM represent a guest pointer, when passed as an
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* hypercall argument.
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* XEN_GUEST_HANDLE_PARAM and XEN_GUEST_HANDLE are the same on X86 but
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* they might not be on other architectures.
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*/
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#define __DEFINE_XEN_GUEST_HANDLE(name, type) \
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___DEFINE_XEN_GUEST_HANDLE(name, type); \
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___DEFINE_XEN_GUEST_HANDLE(const_##name, const type)
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#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name)
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#define __XEN_GUEST_HANDLE(name) __guest_handle_ ## name
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#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name)
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#define XEN_GUEST_HANDLE_PARAM(name) XEN_GUEST_HANDLE(name)
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#define set_xen_guest_handle_raw(hnd, val) do { (hnd).p = val; } while (0)
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#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
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#if defined(__i386__)
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# ifdef __XEN__
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__DeFiNe__ __DECL_REG_LO8(which) uint32_t e ## which ## x
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__DeFiNe__ __DECL_REG_LO16(name) union { uint32_t e ## name; }
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# endif
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#include "xen-x86_32.h"
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# ifdef __XEN__
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__UnDeF__ __DECL_REG_LO8
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__UnDeF__ __DECL_REG_LO16
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__DeFiNe__ __DECL_REG_LO8(which) e ## which ## x
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__DeFiNe__ __DECL_REG_LO16(name) e ## name
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# endif
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#elif defined(__x86_64__)
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#include "xen-x86_64.h"
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#endif
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#ifndef __ASSEMBLY__
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typedef unsigned long xen_pfn_t;
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#define PRI_xen_pfn "lx"
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#define PRIu_xen_pfn "lu"
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#endif
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#define XEN_HAVE_PV_GUEST_ENTRY 1
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#define XEN_HAVE_PV_UPCALL_MASK 1
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/*
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* `incontents 200 segdesc Segment Descriptor Tables
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*/
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/*
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* ` enum neg_errnoval
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* ` HYPERVISOR_set_gdt(const xen_pfn_t frames[], unsigned int entries);
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* `
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*/
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/*
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* A number of GDT entries are reserved by Xen. These are not situated at the
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* start of the GDT because some stupid OSes export hard-coded selector values
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* in their ABI. These hard-coded values are always near the start of the GDT,
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* so Xen places itself out of the way, at the far end of the GDT.
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*
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* NB The LDT is set using the MMUEXT_SET_LDT op of HYPERVISOR_mmuext_op
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*/
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#define FIRST_RESERVED_GDT_PAGE 14
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#define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096)
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#define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8)
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/*
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* ` enum neg_errnoval
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* ` HYPERVISOR_update_descriptor(u64 pa, u64 desc);
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* `
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* ` @pa The machine physical address of the descriptor to
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* ` update. Must be either a descriptor page or writable.
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* ` @desc The descriptor value to update, in the same format as a
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* ` native descriptor table entry.
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*/
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/* Maximum number of virtual CPUs in legacy multi-processor guests. */
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#define XEN_LEGACY_MAX_VCPUS 32
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#ifndef __ASSEMBLY__
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typedef unsigned long xen_ulong_t;
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#define PRI_xen_ulong "lx"
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/*
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* ` enum neg_errnoval
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* ` HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp);
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* `
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* Sets the stack segment and pointer for the current vcpu.
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*/
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/*
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* ` enum neg_errnoval
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* ` HYPERVISOR_set_trap_table(const struct trap_info traps[]);
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* `
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*/
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/*
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* Send an array of these to HYPERVISOR_set_trap_table().
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* Terminate the array with a sentinel entry, with traps[].address==0.
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* The privilege level specifies which modes may enter a trap via a software
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* interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate
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* privilege levels as follows:
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* Level == 0: Noone may enter
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* Level == 1: Kernel may enter
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* Level == 2: Kernel may enter
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* Level == 3: Everyone may enter
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*
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* Note: For compatibility with kernels not setting up exception handlers
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* early enough, Xen will avoid trying to inject #GP (and hence crash
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* the domain) when an RDMSR would require this, but no handler was
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* set yet. The precise conditions are implementation specific, and
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* new code may not rely on such behavior anyway.
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*/
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#define TI_GET_DPL(_ti) ((_ti)->flags & 3)
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#define TI_GET_IF(_ti) ((_ti)->flags & 4)
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#define TI_SET_DPL(_ti,_dpl) ((_ti)->flags |= (_dpl))
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#define TI_SET_IF(_ti,_if) ((_ti)->flags |= ((!!(_if))<<2))
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struct trap_info {
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uint8_t vector; /* exception vector */
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uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */
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uint16_t cs; /* code selector */
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unsigned long address; /* code offset */
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};
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typedef struct trap_info trap_info_t;
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DEFINE_XEN_GUEST_HANDLE(trap_info_t);
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typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */
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/*
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* The following is all CPU context. Note that the fpu_ctxt block is filled
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* in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
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*
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* Also note that when calling DOMCTL_setvcpucontext for HVM guests, not all
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* information in this structure is updated, the fields read include: fpu_ctxt
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* (if VGCT_I387_VALID is set), flags, user_regs and debugreg[*].
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*
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* Note: VCPUOP_initialise for HVM guests is non-symetric with
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* DOMCTL_setvcpucontext, and uses struct vcpu_hvm_context from hvm/hvm_vcpu.h
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*/
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struct vcpu_guest_context {
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/* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */
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struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */
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#define VGCF_I387_VALID (1<<0)
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#define VGCF_IN_KERNEL (1<<2)
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#define _VGCF_i387_valid 0
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#define VGCF_i387_valid (1<<_VGCF_i387_valid)
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#define _VGCF_in_kernel 2
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#define VGCF_in_kernel (1<<_VGCF_in_kernel)
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#define _VGCF_failsafe_disables_events 3
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#define VGCF_failsafe_disables_events (1<<_VGCF_failsafe_disables_events)
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#define _VGCF_syscall_disables_events 4
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#define VGCF_syscall_disables_events (1<<_VGCF_syscall_disables_events)
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#define _VGCF_online 5
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#define VGCF_online (1<<_VGCF_online)
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unsigned long flags; /* VGCF_* flags */
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struct cpu_user_regs user_regs; /* User-level CPU registers */
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struct trap_info trap_ctxt[256]; /* Virtual IDT */
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unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */
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unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
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unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */
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/* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */
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unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */
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unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */
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#ifdef __i386__
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unsigned long event_callback_cs; /* CS:EIP of event callback */
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unsigned long event_callback_eip;
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unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */
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unsigned long failsafe_callback_eip;
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#else
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unsigned long event_callback_eip;
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unsigned long failsafe_callback_eip;
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#ifdef __XEN__
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union {
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unsigned long syscall_callback_eip;
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struct {
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unsigned int event_callback_cs; /* compat CS of event cb */
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unsigned int failsafe_callback_cs; /* compat CS of failsafe cb */
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};
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};
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#else
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unsigned long syscall_callback_eip;
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#endif
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#endif
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unsigned long vm_assist; /* VMASST_TYPE_* bitmap */
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#ifdef __x86_64__
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/* Segment base addresses. */
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uint64_t fs_base;
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uint64_t gs_base_kernel;
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uint64_t gs_base_user;
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#endif
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};
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typedef struct vcpu_guest_context vcpu_guest_context_t;
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DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
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struct arch_shared_info {
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/*
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* Number of valid entries in the p2m table(s) anchored at
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* pfn_to_mfn_frame_list_list and/or p2m_vaddr.
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*/
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unsigned long max_pfn;
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/*
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* Frame containing list of mfns containing list of mfns containing p2m.
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* A value of 0 indicates it has not yet been set up, ~0 indicates it has
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* been set to invalid e.g. due to the p2m being too large for the 3-level
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* p2m tree. In this case the linear mapper p2m list anchored at p2m_vaddr
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* is to be used.
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*/
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xen_pfn_t pfn_to_mfn_frame_list_list;
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unsigned long nmi_reason;
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/*
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* Following three fields are valid if p2m_cr3 contains a value different
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* from 0.
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* p2m_cr3 is the root of the address space where p2m_vaddr is valid.
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* p2m_cr3 is in the same format as a cr3 value in the vcpu register state
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* and holds the folded machine frame number (via xen_pfn_to_cr3) of a
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* L3 or L4 page table.
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* p2m_vaddr holds the virtual address of the linear p2m list. All entries
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* in the range [0...max_pfn[ are accessible via this pointer.
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* p2m_generation will be incremented by the guest before and after each
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* change of the mappings of the p2m list. p2m_generation starts at 0 and
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* a value with the least significant bit set indicates that a mapping
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* update is in progress. This allows guest external software (e.g. in Dom0)
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* to verify that read mappings are consistent and whether they have changed
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* since the last check.
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* Modifying a p2m element in the linear p2m list is allowed via an atomic
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* write only.
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*/
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unsigned long p2m_cr3; /* cr3 value of the p2m address space */
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unsigned long p2m_vaddr; /* virtual address of the p2m list */
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unsigned long p2m_generation; /* generation count of p2m mapping */
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#ifdef __i386__
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/* There's no room for this field in the generic structure. */
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uint32_t wc_sec_hi;
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#endif
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};
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typedef struct arch_shared_info arch_shared_info_t;
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#if defined(__XEN__) || defined(__XEN_TOOLS__)
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/*
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* struct xen_arch_domainconfig's ABI is covered by
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* XEN_DOMCTL_INTERFACE_VERSION.
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*/
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struct xen_arch_domainconfig {
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#define _XEN_X86_EMU_LAPIC 0
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#define XEN_X86_EMU_LAPIC (1U<<_XEN_X86_EMU_LAPIC)
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#define _XEN_X86_EMU_HPET 1
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#define XEN_X86_EMU_HPET (1U<<_XEN_X86_EMU_HPET)
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#define _XEN_X86_EMU_PM 2
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#define XEN_X86_EMU_PM (1U<<_XEN_X86_EMU_PM)
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#define _XEN_X86_EMU_RTC 3
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#define XEN_X86_EMU_RTC (1U<<_XEN_X86_EMU_RTC)
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#define _XEN_X86_EMU_IOAPIC 4
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#define XEN_X86_EMU_IOAPIC (1U<<_XEN_X86_EMU_IOAPIC)
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#define _XEN_X86_EMU_PIC 5
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#define XEN_X86_EMU_PIC (1U<<_XEN_X86_EMU_PIC)
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#define _XEN_X86_EMU_VGA 6
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#define XEN_X86_EMU_VGA (1U<<_XEN_X86_EMU_VGA)
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#define _XEN_X86_EMU_IOMMU 7
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#define XEN_X86_EMU_IOMMU (1U<<_XEN_X86_EMU_IOMMU)
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#define _XEN_X86_EMU_PIT 8
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#define XEN_X86_EMU_PIT (1U<<_XEN_X86_EMU_PIT)
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#define _XEN_X86_EMU_USE_PIRQ 9
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#define XEN_X86_EMU_USE_PIRQ (1U<<_XEN_X86_EMU_USE_PIRQ)
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#define _XEN_X86_EMU_VPCI 10
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#define XEN_X86_EMU_VPCI (1U<<_XEN_X86_EMU_VPCI)
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#define XEN_X86_EMU_ALL (XEN_X86_EMU_LAPIC | XEN_X86_EMU_HPET | \
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XEN_X86_EMU_PM | XEN_X86_EMU_RTC | \
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XEN_X86_EMU_IOAPIC | XEN_X86_EMU_PIC | \
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XEN_X86_EMU_VGA | XEN_X86_EMU_IOMMU | \
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XEN_X86_EMU_PIT | XEN_X86_EMU_USE_PIRQ |\
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XEN_X86_EMU_VPCI)
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uint32_t emulation_flags;
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/*
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* Select whether to use a relaxed behavior for accesses to MSRs not explicitly
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* handled by Xen instead of injecting a #GP to the guest. Note this option
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* doesn't allow the guest to read or write to the underlying MSR.
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*/
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#define XEN_X86_MSR_RELAXED (1u << 0)
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uint32_t misc_flags;
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};
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/* Max XEN_X86_* constant. Used for ABI checking. */
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#define XEN_X86_MISC_FLAGS_MAX XEN_X86_MSR_RELAXED
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#endif
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/*
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* Representations of architectural CPUID and MSR information. Used as the
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* serialised version of Xen's internal representation.
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*/
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typedef struct xen_cpuid_leaf {
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#define XEN_CPUID_NO_SUBLEAF 0xffffffffu
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uint32_t leaf, subleaf;
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uint32_t a, b, c, d;
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} xen_cpuid_leaf_t;
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DEFINE_XEN_GUEST_HANDLE(xen_cpuid_leaf_t);
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typedef struct xen_msr_entry {
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uint32_t idx;
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uint32_t flags; /* Reserved MBZ. */
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uint64_t val;
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} xen_msr_entry_t;
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DEFINE_XEN_GUEST_HANDLE(xen_msr_entry_t);
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#endif /* !__ASSEMBLY__ */
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/*
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* ` enum neg_errnoval
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* ` HYPERVISOR_fpu_taskswitch(int set);
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* `
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* Sets (if set!=0) or clears (if set==0) CR0.TS.
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*/
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/*
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* ` enum neg_errnoval
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* ` HYPERVISOR_set_debugreg(int regno, unsigned long value);
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*
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* ` unsigned long
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* ` HYPERVISOR_get_debugreg(int regno);
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* For 0<=reg<=7, returns the debug register value.
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* For other values of reg, returns ((unsigned long)-EINVAL).
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* (Unfortunately, this interface is defective.)
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*/
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/*
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* Prefix forces emulation of some non-trapping instructions.
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* Currently only CPUID.
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*/
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#ifdef __ASSEMBLY__
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#define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ;
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#define XEN_CPUID XEN_EMULATE_PREFIX cpuid
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#else
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#define XEN_EMULATE_PREFIX ".byte 0x0f,0x0b,0x78,0x65,0x6e ; "
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#define XEN_CPUID XEN_EMULATE_PREFIX "cpuid"
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#endif
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/*
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* Debug console IO port, also called "port E9 hack". Each character written
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* to this IO port will be printed on the hypervisor console, subject to log
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* level restrictions.
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*/
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#define XEN_HVM_DEBUGCONS_IOPORT 0xe9
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#endif /* __XEN_PUBLIC_ARCH_X86_XEN_H__ */
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/*
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* Local variables:
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* mode: C
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* c-file-style: "BSD"
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* c-basic-offset: 4
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* tab-width: 4
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* indent-tabs-mode: nil
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* End:
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*/
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