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The Allwinner H3 System on Chip has an System Control module that provides system wide generic controls and device information. This commit adds support for the Allwinner H3 System Control module. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200311221854.30370-6-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
121 lines
3.1 KiB
C
121 lines
3.1 KiB
C
/*
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* Allwinner H3 System on Chip emulation
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*
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* Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* The Allwinner H3 is a System on Chip containing four ARM Cortex A7
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* processor cores. Features and specifications include DDR2/DDR3 memory,
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* SD/MMC storage cards, 10/100/1000Mbit Ethernet, USB 2.0, HDMI and
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* various I/O modules.
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*
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* This implementation is based on the following datasheet:
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*
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* https://linux-sunxi.org/File:Allwinner_H3_Datasheet_V1.2.pdf
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*
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* The latest datasheet and more info can be found on the Linux Sunxi wiki:
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*
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* https://linux-sunxi.org/H3
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*/
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#ifndef HW_ARM_ALLWINNER_H3_H
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#define HW_ARM_ALLWINNER_H3_H
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#include "qom/object.h"
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#include "hw/arm/boot.h"
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#include "hw/timer/allwinner-a10-pit.h"
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#include "hw/intc/arm_gic.h"
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#include "hw/misc/allwinner-h3-ccu.h"
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#include "hw/misc/allwinner-h3-sysctrl.h"
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#include "target/arm/cpu.h"
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/**
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* Allwinner H3 device list
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*
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* This enumeration is can be used refer to a particular device in the
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* Allwinner H3 SoC. For example, the physical memory base address for
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* each device can be found in the AwH3State object in the memmap member
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* using the device enum value as index.
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*
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* @see AwH3State
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*/
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enum {
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AW_H3_SRAM_A1,
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AW_H3_SRAM_A2,
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AW_H3_SRAM_C,
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AW_H3_SYSCTRL,
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AW_H3_EHCI0,
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AW_H3_OHCI0,
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AW_H3_EHCI1,
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AW_H3_OHCI1,
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AW_H3_EHCI2,
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AW_H3_OHCI2,
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AW_H3_EHCI3,
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AW_H3_OHCI3,
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AW_H3_CCU,
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AW_H3_PIT,
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AW_H3_UART0,
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AW_H3_UART1,
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AW_H3_UART2,
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AW_H3_UART3,
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AW_H3_GIC_DIST,
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AW_H3_GIC_CPU,
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AW_H3_GIC_HYP,
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AW_H3_GIC_VCPU,
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AW_H3_SDRAM
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};
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/** Total number of CPU cores in the H3 SoC */
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#define AW_H3_NUM_CPUS (4)
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/**
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* Allwinner H3 object model
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* @{
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*/
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/** Object type for the Allwinner H3 SoC */
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#define TYPE_AW_H3 "allwinner-h3"
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/** Convert input object to Allwinner H3 state object */
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#define AW_H3(obj) OBJECT_CHECK(AwH3State, (obj), TYPE_AW_H3)
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/** @} */
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/**
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* Allwinner H3 object
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*
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* This struct contains the state of all the devices
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* which are currently emulated by the H3 SoC code.
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*/
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typedef struct AwH3State {
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/*< private >*/
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DeviceState parent_obj;
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/*< public >*/
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ARMCPU cpus[AW_H3_NUM_CPUS];
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const hwaddr *memmap;
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AwA10PITState timer;
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AwH3ClockCtlState ccu;
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AwH3SysCtrlState sysctrl;
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GICState gic;
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MemoryRegion sram_a1;
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MemoryRegion sram_a2;
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MemoryRegion sram_c;
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} AwH3State;
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#endif /* HW_ARM_ALLWINNER_H3_H */
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