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		a8d2532645
		
	
	
	
	
		
			
			No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]
		
			
				
	
	
		
			113 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			113 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This work is licensed under the terms of the GNU GPL, version 2 or later.
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|  * See the COPYING file in the top-level directory.
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|  */
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| #include "qemu/osdep.h"
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| 
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| #include "cpu.h"
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| 
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| void x86_cpu_xsave_all_areas(X86CPU *cpu, X86XSaveArea *buf)
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| {
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|     CPUX86State *env = &cpu->env;
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|     X86XSaveArea *xsave = buf;
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| 
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|     uint16_t cwd, swd, twd;
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|     int i;
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|     memset(xsave, 0, sizeof(X86XSaveArea));
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|     twd = 0;
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|     swd = env->fpus & ~(7 << 11);
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|     swd |= (env->fpstt & 7) << 11;
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|     cwd = env->fpuc;
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|     for (i = 0; i < 8; ++i) {
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|         twd |= (!env->fptags[i]) << i;
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|     }
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|     xsave->legacy.fcw = cwd;
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|     xsave->legacy.fsw = swd;
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|     xsave->legacy.ftw = twd;
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|     xsave->legacy.fpop = env->fpop;
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|     xsave->legacy.fpip = env->fpip;
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|     xsave->legacy.fpdp = env->fpdp;
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|     memcpy(&xsave->legacy.fpregs, env->fpregs,
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|             sizeof env->fpregs);
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|     xsave->legacy.mxcsr = env->mxcsr;
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|     xsave->header.xstate_bv = env->xstate_bv;
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|     memcpy(&xsave->bndreg_state.bnd_regs, env->bnd_regs,
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|             sizeof env->bnd_regs);
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|     xsave->bndcsr_state.bndcsr = env->bndcs_regs;
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|     memcpy(&xsave->opmask_state.opmask_regs, env->opmask_regs,
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|             sizeof env->opmask_regs);
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| 
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|     for (i = 0; i < CPU_NB_REGS; i++) {
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|         uint8_t *xmm = xsave->legacy.xmm_regs[i];
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|         uint8_t *ymmh = xsave->avx_state.ymmh[i];
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|         uint8_t *zmmh = xsave->zmm_hi256_state.zmm_hi256[i];
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|         stq_p(xmm,     env->xmm_regs[i].ZMM_Q(0));
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|         stq_p(xmm+8,   env->xmm_regs[i].ZMM_Q(1));
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|         stq_p(ymmh,    env->xmm_regs[i].ZMM_Q(2));
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|         stq_p(ymmh+8,  env->xmm_regs[i].ZMM_Q(3));
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|         stq_p(zmmh,    env->xmm_regs[i].ZMM_Q(4));
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|         stq_p(zmmh+8,  env->xmm_regs[i].ZMM_Q(5));
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|         stq_p(zmmh+16, env->xmm_regs[i].ZMM_Q(6));
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|         stq_p(zmmh+24, env->xmm_regs[i].ZMM_Q(7));
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|     }
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| 
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| #ifdef TARGET_X86_64
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|     memcpy(&xsave->hi16_zmm_state.hi16_zmm, &env->xmm_regs[16],
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|             16 * sizeof env->xmm_regs[16]);
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|     memcpy(&xsave->pkru_state, &env->pkru, sizeof env->pkru);
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| #endif
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| 
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| }
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| 
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| void x86_cpu_xrstor_all_areas(X86CPU *cpu, const X86XSaveArea *buf)
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| {
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| 
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|     CPUX86State *env = &cpu->env;
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|     const X86XSaveArea *xsave = buf;
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| 
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|     int i;
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|     uint16_t cwd, swd, twd;
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|     cwd = xsave->legacy.fcw;
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|     swd = xsave->legacy.fsw;
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|     twd = xsave->legacy.ftw;
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|     env->fpop = xsave->legacy.fpop;
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|     env->fpstt = (swd >> 11) & 7;
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|     env->fpus = swd;
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|     env->fpuc = cwd;
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|     for (i = 0; i < 8; ++i) {
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|         env->fptags[i] = !((twd >> i) & 1);
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|     }
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|     env->fpip = xsave->legacy.fpip;
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|     env->fpdp = xsave->legacy.fpdp;
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|     env->mxcsr = xsave->legacy.mxcsr;
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|     memcpy(env->fpregs, &xsave->legacy.fpregs,
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|             sizeof env->fpregs);
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|     env->xstate_bv = xsave->header.xstate_bv;
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|     memcpy(env->bnd_regs, &xsave->bndreg_state.bnd_regs,
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|             sizeof env->bnd_regs);
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|     env->bndcs_regs = xsave->bndcsr_state.bndcsr;
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|     memcpy(env->opmask_regs, &xsave->opmask_state.opmask_regs,
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|             sizeof env->opmask_regs);
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| 
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|     for (i = 0; i < CPU_NB_REGS; i++) {
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|         const uint8_t *xmm = xsave->legacy.xmm_regs[i];
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|         const uint8_t *ymmh = xsave->avx_state.ymmh[i];
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|         const uint8_t *zmmh = xsave->zmm_hi256_state.zmm_hi256[i];
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|         env->xmm_regs[i].ZMM_Q(0) = ldq_p(xmm);
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|         env->xmm_regs[i].ZMM_Q(1) = ldq_p(xmm+8);
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|         env->xmm_regs[i].ZMM_Q(2) = ldq_p(ymmh);
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|         env->xmm_regs[i].ZMM_Q(3) = ldq_p(ymmh+8);
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|         env->xmm_regs[i].ZMM_Q(4) = ldq_p(zmmh);
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|         env->xmm_regs[i].ZMM_Q(5) = ldq_p(zmmh+8);
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|         env->xmm_regs[i].ZMM_Q(6) = ldq_p(zmmh+16);
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|         env->xmm_regs[i].ZMM_Q(7) = ldq_p(zmmh+24);
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|     }
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| 
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| #ifdef TARGET_X86_64
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|     memcpy(&env->xmm_regs[16], &xsave->hi16_zmm_state.hi16_zmm,
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|            16 * sizeof env->xmm_regs[16]);
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|     memcpy(&env->pkru, &xsave->pkru_state, sizeof env->pkru);
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| #endif
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| 
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| }
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