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a7e8e30e7c
* New CPU type: cortex-a710
* Implement new architectural features:
- FEAT_PACQARMA3
- FEAT_EPAC
- FEAT_Pauth2
- FEAT_FPAC
- FEAT_FPACCOMBINE
- FEAT_TIDCP1
* Xilinx Versal: Model the CFU/CFI
* Implement RMR_ELx registers
* Implement handling of HCR_EL2.TIDCP trap bit
* arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE
* hw/intc/arm_gicv3_its: Avoid maybe-uninitialized error in get_vte()
* target/arm: Do not use gen_mte_checkN in trans_STGP
* arm64: Restore trapless ptimer access
-----BEGIN PGP SIGNATURE-----
iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmT7VEkZHHBldGVyLm1h
eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3v7BEACENUKCxsFHRQSLmQkoBCT9
Lc4SJrGCbVUC6b+4s5ligZSWIoFzp/kY6NPpeRYqFa0DCxozd2T5D81/j7TpSo0C
wUFkZfUq1nGFJ4K5arYcDwhdTtJvvc07YrSbUqufBp6uNGqhR4YmDWPECqBfOlaj
7bgJM6axsg7FkJJh5zp4cQ4WEfp14MHWRPQWpVTI+9cxNmNymokSVRBhVFkM0Wen
WD4C/nYud8bOxpDfR8GkIqJ+UnUMhUNEhp28QmHdwywgg0zLWOE4ysIxo55cM0+0
FL3q45PL2e4S24UUx9dkxDBWnKEZ5qpQpPn9F6EhWzfm3n2dqr4uUnfWAEOg6NAi
vnGS9MlL7nZo69OM3h8g7yKDfTKYm2vl9HVZ0ytFA6PLoSnaQyQwli58qnLtiid3
17MWPoNQlq6G8tHUTPkrJjdA8XLz0iNPXe5G2kwhuM/S0Lv7ORzDc2pq4qBYLvIw
9nV0oUWqzyE7zH6bRKxbbPw2sMI7c8qQr9QRyZeLHL7HdcY5ExvX9FH+qii5JDR/
fZohi1pBoNNwYYTeSRnxgHiQ7OizYq0xQJhrdqcFF9voytZj1yZEZ0mp6Tq0/CIj
YkC/vEyLYBqgrJ2JeUjbV3h1RIzQcVaXxnxwGsyMyceACd6MNMmdbjR7bZk0lNIu
kh+aFEdKajPp56UseJiKBQ==
=5Shq
-----END PGP SIGNATURE-----
Merge tag 'pull-target-arm-20230908' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* New CPU type: cortex-a710
* Implement new architectural features:
- FEAT_PACQARMA3
- FEAT_EPAC
- FEAT_Pauth2
- FEAT_FPAC
- FEAT_FPACCOMBINE
- FEAT_TIDCP1
* Xilinx Versal: Model the CFU/CFI
* Implement RMR_ELx registers
* Implement handling of HCR_EL2.TIDCP trap bit
* arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE
* hw/intc/arm_gicv3_its: Avoid maybe-uninitialized error in get_vte()
* target/arm: Do not use gen_mte_checkN in trans_STGP
* arm64: Restore trapless ptimer access
# -----BEGIN PGP SIGNATURE-----
#
# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmT7VEkZHHBldGVyLm1h
# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3v7BEACENUKCxsFHRQSLmQkoBCT9
# Lc4SJrGCbVUC6b+4s5ligZSWIoFzp/kY6NPpeRYqFa0DCxozd2T5D81/j7TpSo0C
# wUFkZfUq1nGFJ4K5arYcDwhdTtJvvc07YrSbUqufBp6uNGqhR4YmDWPECqBfOlaj
# 7bgJM6axsg7FkJJh5zp4cQ4WEfp14MHWRPQWpVTI+9cxNmNymokSVRBhVFkM0Wen
# WD4C/nYud8bOxpDfR8GkIqJ+UnUMhUNEhp28QmHdwywgg0zLWOE4ysIxo55cM0+0
# FL3q45PL2e4S24UUx9dkxDBWnKEZ5qpQpPn9F6EhWzfm3n2dqr4uUnfWAEOg6NAi
# vnGS9MlL7nZo69OM3h8g7yKDfTKYm2vl9HVZ0ytFA6PLoSnaQyQwli58qnLtiid3
# 17MWPoNQlq6G8tHUTPkrJjdA8XLz0iNPXe5G2kwhuM/S0Lv7ORzDc2pq4qBYLvIw
# 9nV0oUWqzyE7zH6bRKxbbPw2sMI7c8qQr9QRyZeLHL7HdcY5ExvX9FH+qii5JDR/
# fZohi1pBoNNwYYTeSRnxgHiQ7OizYq0xQJhrdqcFF9voytZj1yZEZ0mp6Tq0/CIj
# YkC/vEyLYBqgrJ2JeUjbV3h1RIzQcVaXxnxwGsyMyceACd6MNMmdbjR7bZk0lNIu
# kh+aFEdKajPp56UseJiKBQ==
# =5Shq
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 08 Sep 2023 13:05:13 EDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20230908' of https://git.linaro.org/people/pmaydell/qemu-arm: (26 commits)
arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE
target/arm: Enable SCTLR_EL1.TIDCP for user-only
target/arm: Implement FEAT_TIDCP1
target/arm: Implement HCR_EL2.TIDCP
target/arm: Implement cortex-a710
target/arm: Implement RMR_ELx
arm64: Restore trapless ptimer access
target/arm: Do not use gen_mte_checkN in trans_STGP
hw/arm/versal: Connect the CFRAME_REG and CFRAME_BCAST_REG
hw/arm/xlnx-versal: Connect the CFU_APB, CFU_FDRO and CFU_SFR
hw/misc: Introduce a model of Xilinx Versal's CFRAME_BCAST_REG
hw/misc: Introduce a model of Xilinx Versal's CFRAME_REG
hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal's CFU_SFR
hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal CFU_FDRO
hw/misc: Introduce a model of Xilinx Versal's CFU_APB
hw/misc: Introduce the Xilinx CFI interface
hw/intc/arm_gicv3_its: Avoid maybe-uninitialized error in get_vte()
target/arm: Implement FEAT_FPAC and FEAT_FPACCOMBINE
target/arm: Inform helpers whether a PAC instruction is 'combined'
target/arm: Implement FEAT_Pauth2
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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| .. | ||
| macio | ||
| a9scu.h | ||
| allwinner-a10-ccm.h | ||
| allwinner-a10-dramc.h | ||
| allwinner-cpucfg.h | ||
| allwinner-h3-ccu.h | ||
| allwinner-h3-dramc.h | ||
| allwinner-h3-sysctrl.h | ||
| allwinner-r40-ccu.h | ||
| allwinner-r40-dramc.h | ||
| allwinner-sid.h | ||
| allwinner-sramc.h | ||
| arm11scu.h | ||
| arm_integrator_debug.h | ||
| armsse-cpu-pwrctrl.h | ||
| armsse-cpuid.h | ||
| armsse-mhu.h | ||
| armv7m_ras.h | ||
| aspeed_hace.h | ||
| aspeed_i3c.h | ||
| aspeed_lpc.h | ||
| aspeed_peci.h | ||
| aspeed_sbc.h | ||
| aspeed_scu.h | ||
| aspeed_sdmc.h | ||
| aspeed_xdma.h | ||
| auxbus.h | ||
| avr_power.h | ||
| bcm2835_cprman_internals.h | ||
| bcm2835_cprman.h | ||
| bcm2835_mbox_defs.h | ||
| bcm2835_mbox.h | ||
| bcm2835_mphi.h | ||
| bcm2835_powermgt.h | ||
| bcm2835_property.h | ||
| bcm2835_rng.h | ||
| bcm2835_thermal.h | ||
| cbus.h | ||
| empty_slot.h | ||
| grlib_ahb_apb_pnp.h | ||
| imx6_ccm.h | ||
| imx6_src.h | ||
| imx6ul_ccm.h | ||
| imx7_ccm.h | ||
| imx7_gpr.h | ||
| imx7_snvs.h | ||
| imx7_src.h | ||
| imx25_ccm.h | ||
| imx31_ccm.h | ||
| imx_ccm.h | ||
| imx_rngc.h | ||
| iotkit-secctl.h | ||
| iotkit-sysctl.h | ||
| iotkit-sysinfo.h | ||
| ivshmem.h | ||
| lasi.h | ||
| led.h | ||
| mac_via.h | ||
| mchp_pfsoc_dmc.h | ||
| mchp_pfsoc_ioscb.h | ||
| mchp_pfsoc_sysreg.h | ||
| mips_cmgcr.h | ||
| mips_cpc.h | ||
| mips_itu.h | ||
| mos6522.h | ||
| mps2-fpgaio.h | ||
| mps2-scc.h | ||
| msf2-sysreg.h | ||
| npcm7xx_clk.h | ||
| npcm7xx_gcr.h | ||
| npcm7xx_mft.h | ||
| npcm7xx_pwm.h | ||
| npcm7xx_rng.h | ||
| nrf51_rng.h | ||
| pca9552_regs.h | ||
| pca9552.h | ||
| pvpanic.h | ||
| raspberrypi-fw-defs.h | ||
| sifive_e_aon.h | ||
| sifive_e_prci.h | ||
| sifive_test.h | ||
| sifive_u_otp.h | ||
| sifive_u_prci.h | ||
| stm32f2xx_syscfg.h | ||
| stm32f4xx_exti.h | ||
| stm32f4xx_syscfg.h | ||
| tz-mpc.h | ||
| tz-msc.h | ||
| tz-ppc.h | ||
| unimp.h | ||
| virt_ctrl.h | ||
| vmcoreinfo.h | ||
| xlnx-cfi-if.h | ||
| xlnx-versal-cframe-reg.h | ||
| xlnx-versal-cfu.h | ||
| xlnx-versal-crl.h | ||
| xlnx-versal-pmc-iou-slcr.h | ||
| xlnx-versal-xramc.h | ||
| xlnx-zynqmp-apu-ctrl.h | ||
| xlnx-zynqmp-crf.h | ||