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4f31b54bfe
We commonly define the header guard symbol without an explicit value. Normalize the exceptions. Done with scripts/clean-header-guards.pl. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20220506134911.2856099-4-armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
80 lines
4.1 KiB
C
80 lines
4.1 KiB
C
/*
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* Memory helpers that will be used by TCG generated code.
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef TCG_LDST_H
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#define TCG_LDST_H
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#ifdef CONFIG_SOFTMMU
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/* Value zero-extended to tcg register size. */
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tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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/* Value sign-extended to tcg register size. */
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tcg_target_ulong helper_ret_ldsb_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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tcg_target_ulong helper_le_ldsw_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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tcg_target_ulong helper_le_ldsl_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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tcg_target_ulong helper_be_ldsw_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
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MemOpIdx oi, uintptr_t retaddr);
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void helper_le_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
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MemOpIdx oi, uintptr_t retaddr);
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void helper_le_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
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MemOpIdx oi, uintptr_t retaddr);
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void helper_le_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
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MemOpIdx oi, uintptr_t retaddr);
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void helper_be_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
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MemOpIdx oi, uintptr_t retaddr);
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void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
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MemOpIdx oi, uintptr_t retaddr);
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void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
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MemOpIdx oi, uintptr_t retaddr);
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#else
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G_NORETURN void helper_unaligned_ld(CPUArchState *env, target_ulong addr);
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G_NORETURN void helper_unaligned_st(CPUArchState *env, target_ulong addr);
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#endif /* CONFIG_SOFTMMU */
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#endif /* TCG_LDST_H */
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