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f6783e3438
This patch realize the IPI interrupt controller. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-32-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
34 lines
789 B
C
34 lines
789 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Definitions for loongarch board emulation.
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*
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* Copyright (C) 2021 Loongson Technology Corporation Limited
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*/
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#ifndef HW_LOONGARCH_H
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#define HW_LOONGARCH_H
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#include "target/loongarch/cpu.h"
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#include "hw/boards.h"
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#include "qemu/queue.h"
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#include "hw/intc/loongarch_ipi.h"
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#define LOONGARCH_MAX_VCPUS 4
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#define LOONGARCH_ISA_IO_BASE 0x18000000UL
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#define LOONGARCH_ISA_IO_SIZE 0x0004000
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struct LoongArchMachineState {
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/*< private >*/
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MachineState parent_obj;
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IPICore ipi_core[MAX_IPI_CORE_NUM];
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MemoryRegion lowmem;
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MemoryRegion highmem;
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MemoryRegion isa_io;
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};
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#define TYPE_LOONGARCH_MACHINE MACHINE_TYPE_NAME("virt")
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OBJECT_DECLARE_SIMPLE_TYPE(LoongArchMachineState, LOONGARCH_MACHINE)
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#endif
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