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This patch adds skeleton model of dwc3 usb controller attached to xhci-sysbus device. It defines global register space of DWC3 controller, global registers control the AXI/AHB interfaces properties, external FIFO support and event count support. All of which are unimplemented at present,we are only supporting core reset and read of ID register. Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1607023357-5096-3-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
56 lines
1.8 KiB
C
56 lines
1.8 KiB
C
/*
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* QEMU model of the USB DWC3 host controller emulation.
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*
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* Copyright (c) 2020 Xilinx Inc.
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*
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* Written by Vikram Garhwal<fnu.vikram@xilinx.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HCD_DWC3_H
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#define HCD_DWC3_H
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#include "hw/usb/hcd-xhci.h"
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#include "hw/usb/hcd-xhci-sysbus.h"
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#define TYPE_USB_DWC3 "usb_dwc3"
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#define USB_DWC3(obj) \
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OBJECT_CHECK(USBDWC3, (obj), TYPE_USB_DWC3)
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#define USB_DWC3_R_MAX ((0x530 / 4) + 1)
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#define DWC3_SIZE 0x10000
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typedef struct USBDWC3 {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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XHCISysbusState sysbus_xhci;
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uint32_t regs[USB_DWC3_R_MAX];
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RegisterInfo regs_info[USB_DWC3_R_MAX];
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struct {
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uint8_t mode;
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uint32_t dwc_usb3_user;
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} cfg;
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} USBDWC3;
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#endif
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