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		4af44e1eca
		
	
	
	
	
		
			
			Some of the enum constant names conflict with the QOM type check macros (AW_H3_CCU, AW_H3_SYSCTRL). This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE(). Rename all the constants to AW_H3_DEV_*, to avoid conflicts. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Tested-By: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20200825192110.3528606-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
		
			
				
	
	
		
			162 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			162 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Allwinner H3 System on Chip emulation
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|  *
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|  * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
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|  *
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|  * This program is free software: you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License as published by
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|  * the Free Software Foundation, either version 2 of the License, or
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|  * (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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|  */
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| 
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| /*
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|  * The Allwinner H3 is a System on Chip containing four ARM Cortex A7
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|  * processor cores. Features and specifications include DDR2/DDR3 memory,
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|  * SD/MMC storage cards, 10/100/1000Mbit Ethernet, USB 2.0, HDMI and
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|  * various I/O modules.
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|  *
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|  * This implementation is based on the following datasheet:
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|  *
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|  *   https://linux-sunxi.org/File:Allwinner_H3_Datasheet_V1.2.pdf
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|  *
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|  * The latest datasheet and more info can be found on the Linux Sunxi wiki:
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|  *
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|  *   https://linux-sunxi.org/H3
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|  */
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| 
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| #ifndef HW_ARM_ALLWINNER_H3_H
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| #define HW_ARM_ALLWINNER_H3_H
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| 
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| #include "qom/object.h"
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| #include "hw/arm/boot.h"
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| #include "hw/timer/allwinner-a10-pit.h"
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| #include "hw/intc/arm_gic.h"
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| #include "hw/misc/allwinner-h3-ccu.h"
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| #include "hw/misc/allwinner-cpucfg.h"
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| #include "hw/misc/allwinner-h3-dramc.h"
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| #include "hw/misc/allwinner-h3-sysctrl.h"
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| #include "hw/misc/allwinner-sid.h"
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| #include "hw/sd/allwinner-sdhost.h"
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| #include "hw/net/allwinner-sun8i-emac.h"
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| #include "hw/rtc/allwinner-rtc.h"
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| #include "target/arm/cpu.h"
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| #include "sysemu/block-backend.h"
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| 
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| /**
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|  * Allwinner H3 device list
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|  *
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|  * This enumeration is can be used refer to a particular device in the
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|  * Allwinner H3 SoC. For example, the physical memory base address for
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|  * each device can be found in the AwH3State object in the memmap member
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|  * using the device enum value as index.
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|  *
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|  * @see AwH3State
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|  */
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| enum {
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|     AW_H3_DEV_SRAM_A1,
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|     AW_H3_DEV_SRAM_A2,
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|     AW_H3_DEV_SRAM_C,
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|     AW_H3_DEV_SYSCTRL,
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|     AW_H3_DEV_MMC0,
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|     AW_H3_DEV_SID,
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|     AW_H3_DEV_EHCI0,
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|     AW_H3_DEV_OHCI0,
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|     AW_H3_DEV_EHCI1,
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|     AW_H3_DEV_OHCI1,
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|     AW_H3_DEV_EHCI2,
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|     AW_H3_DEV_OHCI2,
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|     AW_H3_DEV_EHCI3,
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|     AW_H3_DEV_OHCI3,
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|     AW_H3_DEV_CCU,
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|     AW_H3_DEV_PIT,
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|     AW_H3_DEV_UART0,
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|     AW_H3_DEV_UART1,
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|     AW_H3_DEV_UART2,
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|     AW_H3_DEV_UART3,
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|     AW_H3_DEV_EMAC,
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|     AW_H3_DEV_DRAMCOM,
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|     AW_H3_DEV_DRAMCTL,
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|     AW_H3_DEV_DRAMPHY,
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|     AW_H3_DEV_GIC_DIST,
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|     AW_H3_DEV_GIC_CPU,
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|     AW_H3_DEV_GIC_HYP,
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|     AW_H3_DEV_GIC_VCPU,
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|     AW_H3_DEV_RTC,
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|     AW_H3_DEV_CPUCFG,
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|     AW_H3_DEV_SDRAM
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| };
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| 
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| /** Total number of CPU cores in the H3 SoC */
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| #define AW_H3_NUM_CPUS      (4)
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| 
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| /**
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|  * Allwinner H3 object model
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|  * @{
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|  */
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| 
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| /** Object type for the Allwinner H3 SoC */
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| #define TYPE_AW_H3 "allwinner-h3"
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| 
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| /** Convert input object to Allwinner H3 state object */
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| #define AW_H3(obj) OBJECT_CHECK(AwH3State, (obj), TYPE_AW_H3)
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| 
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| /** @} */
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| 
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| /**
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|  * Allwinner H3 object
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|  *
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|  * This struct contains the state of all the devices
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|  * which are currently emulated by the H3 SoC code.
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|  */
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| typedef struct AwH3State {
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|     /*< private >*/
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|     DeviceState parent_obj;
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|     /*< public >*/
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| 
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|     ARMCPU cpus[AW_H3_NUM_CPUS];
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|     const hwaddr *memmap;
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|     AwA10PITState timer;
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|     AwH3ClockCtlState ccu;
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|     AwCpuCfgState cpucfg;
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|     AwH3DramCtlState dramc;
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|     AwH3SysCtrlState sysctrl;
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|     AwSidState sid;
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|     AwSdHostState mmc0;
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|     AwSun8iEmacState emac;
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|     AwRtcState rtc;
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|     GICState gic;
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|     MemoryRegion sram_a1;
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|     MemoryRegion sram_a2;
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|     MemoryRegion sram_c;
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| } AwH3State;
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| 
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| /**
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|  * Emulate Boot ROM firmware setup functionality.
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|  *
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|  * A real Allwinner H3 SoC contains a Boot ROM
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|  * which is the first code that runs right after
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|  * the SoC is powered on. The Boot ROM is responsible
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|  * for loading user code (e.g. a bootloader) from any
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|  * of the supported external devices and writing the
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|  * downloaded code to internal SRAM. After loading the SoC
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|  * begins executing the code written to SRAM.
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|  *
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|  * This function emulates the Boot ROM by copying 32 KiB
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|  * of data from the given block device and writes it to
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|  * the start of the first internal SRAM memory.
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|  *
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|  * @s: Allwinner H3 state object pointer
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|  * @blk: Block backend device object pointer
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|  */
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| void allwinner_h3_bootrom_setup(AwH3State *s, BlockBackend *blk);
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| 
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| #endif /* HW_ARM_ALLWINNER_H3_H */
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