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	 0ee1e1f469
			
		
	
	
		0ee1e1f469
		
	
	
	
	
		
			
			Added Sytem register block of Smartfusion2. This block has PLL registers which are accessed by guest. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
		
			
				
	
	
		
			78 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			78 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Microsemi SmartFusion2 SYSREG
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|  *
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|  * Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a copy
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|  * of this software and associated documentation files (the "Software"), to deal
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|  * in the Software without restriction, including without limitation the rights
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|  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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|  * copies of the Software, and to permit persons to whom the Software is
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|  * furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice shall be included in
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|  * all copies or substantial portions of the Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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|  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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|  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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|  * THE SOFTWARE.
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|  */
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| 
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| #ifndef HW_MSF2_SYSREG_H
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| #define HW_MSF2_SYSREG_H
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| 
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| #include "hw/sysbus.h"
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| 
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| enum {
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|     ESRAM_CR        = 0x00 / 4,
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|     ESRAM_MAX_LAT,
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|     DDR_CR,
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|     ENVM_CR,
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|     ENVM_REMAP_BASE_CR,
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|     ENVM_REMAP_FAB_CR,
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|     CC_CR,
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|     CC_REGION_CR,
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|     CC_LOCK_BASE_ADDR_CR,
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|     CC_FLUSH_INDX_CR,
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|     DDRB_BUF_TIMER_CR,
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|     DDRB_NB_ADDR_CR,
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|     DDRB_NB_SIZE_CR,
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|     DDRB_CR,
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| 
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|     SOFT_RESET_CR  = 0x48 / 4,
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|     M3_CR,
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| 
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|     GPIO_SYSRESET_SEL_CR = 0x58 / 4,
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| 
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|     MDDR_CR = 0x60 / 4,
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| 
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|     MSSDDR_PLL_STATUS_LOW_CR = 0x90 / 4,
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|     MSSDDR_PLL_STATUS_HIGH_CR,
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|     MSSDDR_FACC1_CR,
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|     MSSDDR_FACC2_CR,
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| 
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|     MSSDDR_PLL_STATUS = 0x150 / 4,
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| };
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| 
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| #define MSF2_SYSREG_MMIO_SIZE     0x300
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| 
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| #define TYPE_MSF2_SYSREG          "msf2-sysreg"
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| #define MSF2_SYSREG(obj)  OBJECT_CHECK(MSF2SysregState, (obj), TYPE_MSF2_SYSREG)
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| 
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| typedef struct MSF2SysregState {
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|     SysBusDevice parent_obj;
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| 
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|     MemoryRegion iomem;
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| 
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|     uint8_t apb0div;
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|     uint8_t apb1div;
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| 
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|     uint32_t regs[MSF2_SYSREG_MMIO_SIZE / 4];
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| } MSF2SysregState;
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| 
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| #endif /* HW_MSF2_SYSREG_H */
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