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32d26ea407
Linux writes zeroes at bootup into the default ports for LASI audio and LASI floppy controller to reset those devices. Allow writing to those registers to avoid HPMCs. Signed-off-by: Helge Deller <deller@gmx.de>
80 lines
2.2 KiB
C
80 lines
2.2 KiB
C
/*
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* HP-PARISC Lasi chipset emulation.
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*
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* (C) 2019 by Helge Deller <deller@gmx.de>
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*
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* This work is licensed under the GNU GPL license version 2 or later.
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*
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* Documentation available at:
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* https://parisc.wiki.kernel.org/images-parisc/7/79/Lasi_ers.pdf
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*/
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#ifndef LASI_H
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#define LASI_H
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#include "exec/address-spaces.h"
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#include "hw/pci/pci_host.h"
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#include "hw/boards.h"
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#define TYPE_LASI_CHIP "lasi-chip"
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OBJECT_DECLARE_SIMPLE_TYPE(LasiState, LASI_CHIP)
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#define LASI_IRR 0x00 /* RO */
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#define LASI_IMR 0x04
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#define LASI_IPR 0x08
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#define LASI_ICR 0x0c
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#define LASI_IAR 0x10
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#define LASI_LPT 0x02000
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#define LASI_AUDIO 0x04000
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#define LASI_UART 0x05000
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#define LASI_LAN 0x07000
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#define LASI_RTC 0x09000
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#define LASI_FDC 0x0A000
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#define LASI_PCR 0x0C000 /* LASI Power Control register */
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#define LASI_ERRLOG 0x0C004 /* LASI Error Logging register */
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#define LASI_VER 0x0C008 /* LASI Version Control register */
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#define LASI_IORESET 0x0C00C /* LASI I/O Reset register */
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#define LASI_AMR 0x0C010 /* LASI Arbitration Mask register */
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#define LASI_IO_CONF 0x7FFFE /* LASI primary configuration register */
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#define LASI_IO_CONF2 0x7FFFF /* LASI secondary configuration register */
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#define LASI_BIT(x) (1ul << (x))
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#define LASI_IRQ_BITS (LASI_BIT(5) | LASI_BIT(7) | LASI_BIT(8) | LASI_BIT(9) \
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| LASI_BIT(13) | LASI_BIT(14) | LASI_BIT(16) | LASI_BIT(17) \
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| LASI_BIT(18) | LASI_BIT(19) | LASI_BIT(20) | LASI_BIT(21) \
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| LASI_BIT(26))
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#define ICR_BUS_ERROR_BIT LASI_BIT(8) /* bit 8 in ICR */
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#define ICR_TOC_BIT LASI_BIT(1) /* bit 1 in ICR */
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#define LASI_IRQS 27
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#define LASI_IRQ_HPA 14
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#define LASI_IRQ_UART_HPA 5
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#define LASI_IRQ_LPT_HPA 7
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#define LASI_IRQ_LAN_HPA 8
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#define LASI_IRQ_SCSI_HPA 9
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#define LASI_IRQ_AUDIO_HPA 13
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#define LASI_IRQ_PS2KBD_HPA 26
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#define LASI_IRQ_PS2MOU_HPA 26
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struct LasiState {
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PCIHostState parent_obj;
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uint32_t irr;
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uint32_t imr;
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uint32_t ipr;
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uint32_t icr;
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uint32_t iar;
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uint32_t errlog;
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uint32_t amr;
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uint32_t rtc_ref;
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MemoryRegion this_mem;
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};
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#endif
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