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323a8771cf
The model was generating interrupts for all enabled timers after the expiration of one of them. Avoid this by passing explicitly the timer index to the callback function. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Li Guang <lig.fnst@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1395771730-16882-4-git-send-email-b.galvani@gmail.com [PMM: avoid duplicate typedef of AwA10PITState] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
67 lines
1.7 KiB
C
67 lines
1.7 KiB
C
#ifndef AW_A10_PIT_H
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#define AW_A10_PIT_H
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#include "hw/ptimer.h"
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#define TYPE_AW_A10_PIT "allwinner-A10-timer"
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#define AW_A10_PIT(obj) OBJECT_CHECK(AwA10PITState, (obj), TYPE_AW_A10_PIT)
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#define AW_A10_PIT_TIMER_NR 6
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#define AW_A10_PIT_TIMER_IRQ 0x1
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#define AW_A10_PIT_WDOG_IRQ 0x100
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#define AW_A10_PIT_TIMER_IRQ_EN 0
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#define AW_A10_PIT_TIMER_IRQ_ST 0x4
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#define AW_A10_PIT_TIMER_CONTROL 0x0
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#define AW_A10_PIT_TIMER_EN 0x1
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#define AW_A10_PIT_TIMER_RELOAD 0x2
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#define AW_A10_PIT_TIMER_MODE 0x80
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#define AW_A10_PIT_TIMER_INTERVAL 0x4
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#define AW_A10_PIT_TIMER_COUNT 0x8
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#define AW_A10_PIT_WDOG_CONTROL 0x90
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#define AW_A10_PIT_WDOG_MODE 0x94
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#define AW_A10_PIT_COUNT_CTL 0xa0
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#define AW_A10_PIT_COUNT_RL_EN 0x2
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#define AW_A10_PIT_COUNT_CLR_EN 0x1
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#define AW_A10_PIT_COUNT_LO 0xa4
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#define AW_A10_PIT_COUNT_HI 0xa8
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#define AW_A10_PIT_TIMER_BASE 0x10
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#define AW_A10_PIT_TIMER_BASE_END \
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(AW_A10_PIT_TIMER_BASE * 6 + AW_A10_PIT_TIMER_COUNT)
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#define AW_A10_PIT_DEFAULT_CLOCK 0x4
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typedef struct AwA10PITState AwA10PITState;
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typedef struct AwA10TimerContext {
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AwA10PITState *container;
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int index;
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} AwA10TimerContext;
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struct AwA10PITState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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qemu_irq irq[AW_A10_PIT_TIMER_NR];
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ptimer_state * timer[AW_A10_PIT_TIMER_NR];
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AwA10TimerContext timer_context[AW_A10_PIT_TIMER_NR];
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MemoryRegion iomem;
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uint32_t irq_enable;
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uint32_t irq_status;
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uint32_t control[AW_A10_PIT_TIMER_NR];
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uint32_t interval[AW_A10_PIT_TIMER_NR];
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uint32_t count[AW_A10_PIT_TIMER_NR];
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uint32_t watch_dog_mode;
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uint32_t watch_dog_control;
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uint32_t count_lo;
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uint32_t count_hi;
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uint32_t count_ctl;
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};
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#endif
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