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ce2918cbc3
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
84 lines
3.2 KiB
C
84 lines
3.2 KiB
C
/*
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* QEMU SPAPR Option/Architecture Vector Definitions
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*
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* Each architecture option is organized/documented by the following
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* in LoPAPR 1.1, Table 244:
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*
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* <vector number>: the bit-vector in which the option is located
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* <vector byte>: the byte offset of the vector entry
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* <vector bit>: the bit offset within the vector entry
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*
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* where each vector entry can be one or more bytes.
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*
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* Firmware expects a somewhat literal encoding of this bit-vector
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* structure, where each entry is stored in little-endian so that the
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* byte ordering reflects that of the documentation, but where each bit
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* offset is from "left-to-right" in the traditional representation of
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* a byte value where the MSB is the left-most bit. Thus, each
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* individual byte encodes the option bits in reverse order of the
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* documented bit.
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*
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* These definitions/helpers attempt to abstract away this internal
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* representation so that we can define/set/test for individual option
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* bits using only the documented values. This is done mainly by relying
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* on a bitmap to approximate the documented "bit-vector" structure and
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* handling conversations to-from the internal representation under the
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* covers.
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*
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* Copyright IBM Corp. 2016
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*
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* Authors:
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* Michael Roth <mdroth@linux.vnet.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef _SPAPR_OVEC_H
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#define _SPAPR_OVEC_H
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#include "cpu.h"
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#include "migration/vmstate.h"
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typedef struct SpaprOptionVector SpaprOptionVector;
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#define OV_BIT(byte, bit) ((byte - 1) * BITS_PER_BYTE + bit)
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/* option vector 1 */
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#define OV1_PPC_3_00 OV_BIT(3, 0) /* guest supports PowerPC 3.00? */
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/* option vector 5 */
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#define OV5_DRCONF_MEMORY OV_BIT(2, 2)
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#define OV5_FORM1_AFFINITY OV_BIT(5, 0)
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#define OV5_HP_EVT OV_BIT(6, 5)
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#define OV5_HPT_RESIZE OV_BIT(6, 7)
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#define OV5_DRMEM_V2 OV_BIT(22, 0)
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#define OV5_XIVE_BOTH OV_BIT(23, 0)
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#define OV5_XIVE_EXPLOIT OV_BIT(23, 1) /* 1=exploitation 0=legacy */
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/* ISA 3.00 MMU features: */
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#define OV5_MMU_BOTH OV_BIT(24, 0) /* Radix and hash */
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#define OV5_MMU_RADIX_300 OV_BIT(24, 1) /* 1=Radix only, 0=Hash only */
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#define OV5_MMU_RADIX_GTSE OV_BIT(26, 1) /* Radix GTSE */
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/* interfaces */
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SpaprOptionVector *spapr_ovec_new(void);
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SpaprOptionVector *spapr_ovec_clone(SpaprOptionVector *ov_orig);
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void spapr_ovec_intersect(SpaprOptionVector *ov,
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SpaprOptionVector *ov1,
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SpaprOptionVector *ov2);
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bool spapr_ovec_diff(SpaprOptionVector *ov,
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SpaprOptionVector *ov_old,
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SpaprOptionVector *ov_new);
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void spapr_ovec_cleanup(SpaprOptionVector *ov);
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void spapr_ovec_set(SpaprOptionVector *ov, long bitnr);
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void spapr_ovec_clear(SpaprOptionVector *ov, long bitnr);
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bool spapr_ovec_test(SpaprOptionVector *ov, long bitnr);
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SpaprOptionVector *spapr_ovec_parse_vector(target_ulong table_addr, int vector);
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int spapr_ovec_populate_dt(void *fdt, int fdt_offset,
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SpaprOptionVector *ov, const char *name);
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/* migration */
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extern const VMStateDescription vmstate_spapr_ovec;
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#endif /* !defined (_SPAPR_OVEC_H) */
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