qemu/target/hppa
Helge Deller 6966e0ba1d target/hppa: Fix FPE exceptions
Implement FP exception register #1 (lower 32-bits of 64-bit fr[0]).
A proper implementation is necessary to allow the Linux kernel in
system mode and the qemu linux-user to send proper si_code values
on SIGFPE signal.

Always set the T-bit on taken exception, and merge over- and underflow
in system mode to just set overflow bit to mimic the behaviour I tested
on a physical machine.

The test program below can be used to verify correct behaviour. Note
that behaviour on SIGFPE may vary on different platforms. The program
should always detect the correct signal, but it may or may not be able
to sucessfully continue afterwards.

 #define _GNU_SOURCE
 #include <signal.h>
 #include <stdio.h>
 #include <fenv.h>
 #include <float.h>

 static void fpe_func(int sig, siginfo_t *i, void *v) {
    sigset_t set;
    sigemptyset(&set);
    sigaddset(&set, SIGFPE);
    sigprocmask(SIG_UNBLOCK, &set, NULL);
    printf("GOT signal %d with si_code %ld\n", sig, i->si_code);
 }

 int main(int argc, char *argv[]) {
    struct sigaction action = {
        .sa_sigaction = fpe_func,
        .sa_flags = SA_RESTART|SA_SIGINFO };
    sigaction(SIGFPE, &action, 0);
    feenableexcept(FE_OVERFLOW | FE_UNDERFLOW);
    double x = DBL_MIN;
    return printf("%lf\n", argc > 1
        ? 1.7976931348623158E308*1.7976931348623158E308
        : x / 10);
 }

Signed-off-by: Helge Deller <deller@gmx.de>
(cherry picked from commit ebd394948d)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2025-05-25 11:20:04 +03:00
..
cpu-param.h target/*: Remove TARGET_LONG_BITS from cpu-param.h 2025-02-08 12:41:33 -08:00
cpu-qom.h target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
cpu.c target/hppa: Move has_work() from CPUClass to SysemuCPUOps 2025-03-09 17:00:47 +01:00
cpu.h target/hppa: Remove duplicated CPU_RESOLVING_TYPE definition 2025-03-31 21:32:43 +02:00
fpu_helper.c target/hppa: Fix FPE exceptions 2025-05-25 11:20:04 +03:00
gdbstub.c linux-user/hppa: Force all code addresses to PRIV_USER 2024-05-15 10:03:44 +02:00
helper.c target/hppa: Implement space register hashing for 64-bit HP-UX 2025-01-31 10:05:24 +01:00
helper.h target/hppa: Implement space register hashing for 64-bit HP-UX 2025-01-31 10:05:24 +01:00
insns.decode target/hppa: Add instruction decoding for mfdiag and mtdiag 2025-01-30 13:37:20 +01:00
int_helper.c target/hppa: Copy instruction code into fr1 on FPU assist fault 2025-05-25 11:19:51 +03:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
machine.c target/hppa: Add CPU diagnose registers 2025-01-30 13:37:20 +01:00
mem_helper.c exec: Declare tlb_flush*() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
meson.build meson: Rename target_softmmu_arch -> target_system_arch 2023-10-07 19:03:07 +02:00
op_helper.c accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (3/4) 2024-12-20 17:44:57 +01:00
sys_helper.c target/hppa: Implement space register hashing for 64-bit HP-UX 2025-01-31 10:05:24 +01:00
trace-events target/hppa: Add pa2.0 cpu local tlb flushes 2023-11-06 18:49:34 -08:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate.c target/hppa: Implement space register hashing for 64-bit HP-UX 2025-01-31 10:05:24 +01:00