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d447e4b702
This commit implements UART support for the MAX78000 Signed-off-by: Jackson Donaldson <jcksn@duck.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20250704223239.248781-5-jcksn@duck.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
79 lines
1.6 KiB
C
79 lines
1.6 KiB
C
/*
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* MAX78000 UART
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*
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* Copyright (c) 2025 Jackson Donaldson <jcksn@duck.com>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef HW_MAX78000_UART_H
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#define HW_MAX78000_UART_H
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#include "hw/sysbus.h"
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#include "chardev/char-fe.h"
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#include "qemu/fifo8.h"
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#include "qom/object.h"
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#define UART_CTRL 0x0
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#define UART_STATUS 0x4
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#define UART_INT_EN 0x8
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#define UART_INT_FL 0xc
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#define UART_CLKDIV 0x10
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#define UART_OSR 0x14
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#define UART_TXPEEK 0x18
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#define UART_PNR 0x1c
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#define UART_FIFO 0x20
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#define UART_DMA 0x30
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#define UART_WKEN 0x34
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#define UART_WKFL 0x38
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/* CTRL */
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#define UART_CTF_DIS (1 << 7)
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#define UART_FLUSH_TX (1 << 8)
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#define UART_FLUSH_RX (1 << 9)
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#define UART_BCLKEN (1 << 15)
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#define UART_BCLKRDY (1 << 19)
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/* STATUS */
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#define UART_RX_LVL 8
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#define UART_TX_EM (1 << 6)
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#define UART_RX_FULL (1 << 5)
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#define UART_RX_EM (1 << 4)
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/* PNR (Pin Control Register) */
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#define UART_CTS 1
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#define UART_RTS (1 << 1)
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/* INT_EN / INT_FL */
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#define UART_RX_THD (1 << 4)
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#define UART_TX_HE (1 << 6)
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#define UART_RXBUFLEN 0x100
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#define TYPE_MAX78000_UART "max78000-uart"
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OBJECT_DECLARE_SIMPLE_TYPE(Max78000UartState, MAX78000_UART)
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struct Max78000UartState {
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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uint32_t ctrl;
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uint32_t status;
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uint32_t int_en;
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uint32_t int_fl;
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uint32_t clkdiv;
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uint32_t osr;
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uint32_t txpeek;
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uint32_t pnr;
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uint32_t fifo;
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uint32_t dma;
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uint32_t wken;
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uint32_t wkfl;
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Fifo8 rx_fifo;
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CharBackend chr;
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qemu_irq irq;
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};
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#endif /* HW_STM32F2XX_USART_H */
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