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34f5606ee1
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2 Commits

Author SHA1 Message Date
Petar Jovanovic
34f5606ee1 target-mips: Fix incorrect code and test for INSV 
Content of register rs should be shifted for pos before applying a mask.
This change contains both fix for the instruction and to the existing test.

Signed-off-by: Petar Jovanovic <petarj@mips.com>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 2012-12-06 08:10:50 +01:00
Jia Liu
d70080c4e3 target-mips: Add ASE DSP testcases 
Add MIPS ASE DSP testcases.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 2012-10-31 21:37:21 +01:00