Commit Graph

1519 Commits

Author SHA1 Message Date
Cédric Le Goater
1ebdd2d926 hw/i386: Fix 'use-legacy-x86-rom' property compatibility
Commit 350785d41d ("ramfb: Add property to control if load the
romfile") introduced the `use-legacy-x86-rom` property for the
`vfio-pci-nohotplug` device, allowing control over VGA BIOS ROM
loading. However, the property compatibility setting was incorrectly
applied to the `vfio-pci` device instead, which causes all `vfio-pci`
devices to fail to load. This change fixes the issue by ensuring the
property is set on the correct device.

Fixes: d5fcf0d960 ("hw/i386: Add the ramfb romfile compatibility")
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Shaoqin Huang <shahuang@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250723062714.1245826-1-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-28 17:52:34 +02:00
Stefan Hajnoczi
ebcc602aae Load ramfb vgabios on x86 only.
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Merge tag 'display-20250718-pull-request' of https://gitlab.com/kraxel/qemu into staging

Load ramfb vgabios on x86 only.

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 # gpg: Signature made Fri 18 Jul 2025 15:43:09 EDT
 # gpg:                using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
 # gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
 # gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
 # Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* tag 'display-20250718-pull-request' of https://gitlab.com/kraxel/qemu:
  hw/i386: Add the ramfb romfile compatibility
  vfio: Move the TYPE_* to hw/vfio/types.h
  ramfb: Add property to control if load the romfile

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

Conflicts:
  hw/core/machine.c
  Context conflict because the vfio-pci
  "x-migration-load-config-after-iter" was added recently.
2025-07-21 12:24:36 -04:00
Shaoqin Huang
d5fcf0d960 hw/i386: Add the ramfb romfile compatibility
ramfb is a sysbus device so it can only used for machine types where it
is explicitly enabled:

  # git grep machine_class_allow_dynamic_sysbus_dev.*TYPE_RAMFB_DEVICE
  hw/arm/virt.c:    machine_class_allow_dynamic_sysbus_dev(mc,
		  TYPE_RAMFB_DEVICE);
  hw/i386/microvm.c:    machine_class_allow_dynamic_sysbus_dev(mc,
		  TYPE_RAMFB_DEVICE);
  hw/i386/pc_piix.c:    machine_class_allow_dynamic_sysbus_dev(m,
		  TYPE_RAMFB_DEVICE);
  hw/i386/pc_q35.c:    machine_class_allow_dynamic_sysbus_dev(m,
		  TYPE_RAMFB_DEVICE);
  hw/loongarch/virt.c:    machine_class_allow_dynamic_sysbus_dev(mc,
		  TYPE_RAMFB_DEVICE);
  hw/riscv/virt.c:    machine_class_allow_dynamic_sysbus_dev(mc,
		  TYPE_RAMFB_DEVICE);

So these six are the only machine types we have to worry about.

The three x86 machine types (pc, q35, microvm) will actually use the rom
(when booting with seabios).

For arm/riscv/loongarch virt we want to disable the rom.

This patch sets ramfb romfile option to false by default, except for x86
machines types (pc, q35, microvm) which need the rom file when booting
with seabios and machine types <= 10.0 (handling the case of arm virt,
for compat reasons).

At the same time, set the "use-legacy-x86-rom" property to true on those
historical versioned machine types in order to avoid the memory layout
being changed.

Acked-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
Message-ID: <20250717100941.2230408-4-shahuang@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2025-07-18 21:41:57 +02:00
Stefan Hajnoczi
f96b157ebb Accelerators patches
- Unify x86/arm hw/xen/arch_hvm.h header
 - Move non-system-specific 'accel/accel-ops.h' and 'accel-cpu-ops.h' to accel/
 - Move KVM definitions qapi/accelerator.json
 - Add @qom-type field to CpuInfoFast QAPI structure
 - Display CPU model name in 'info cpus' HMP command
 - Introduce @x-accel-stats QMP command
 - Add 'info accel' on HMP
 - Improve qemu_add_vm_change_state_handler*() docstring
 - Extract TCG statistic related code to tcg-stats.c
 - Implement AccelClass::get_[vcpu]_stats() handlers for TCG and HVF
 - Do not dump NaN in TCG statistics
 - Revert incomplete "accel/tcg: Unregister the RCU before exiting RR thread"
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Merge tag 'accel-20250715' of https://github.com/philmd/qemu into staging

Accelerators patches

- Unify x86/arm hw/xen/arch_hvm.h header
- Move non-system-specific 'accel/accel-ops.h' and 'accel-cpu-ops.h' to accel/
- Move KVM definitions qapi/accelerator.json
- Add @qom-type field to CpuInfoFast QAPI structure
- Display CPU model name in 'info cpus' HMP command
- Introduce @x-accel-stats QMP command
- Add 'info accel' on HMP
- Improve qemu_add_vm_change_state_handler*() docstring
- Extract TCG statistic related code to tcg-stats.c
- Implement AccelClass::get_[vcpu]_stats() handlers for TCG and HVF
- Do not dump NaN in TCG statistics
- Revert incomplete "accel/tcg: Unregister the RCU before exiting RR thread"

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 # gpg: Signature made Tue 15 Jul 2025 15:44:05 EDT
 # gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
 # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
 # Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'accel-20250715' of https://github.com/philmd/qemu:
  system/runstate: Document qemu_add_vm_change_state_handler_prio* in hdr
  system/runstate: Document qemu_add_vm_change_state_handler()
  accel/hvf: Implement AccelClass::get_vcpu_stats() handler
  accel/tcg: Implement AccelClass::get_stats() handler
  accel/tcg: Propagate AccelState to dump_accel_info()
  accel/system: Add 'info accel' on human monitor
  accel/system: Introduce @x-accel-stats QMP command
  accel/tcg: Extract statistic related code to tcg-stats.c
  Revert "accel/tcg: Unregister the RCU before exiting RR thread"
  accel: Extract AccelClass definition to 'accel/accel-ops.h'
  accel: Rename 'system/accel-ops.h' -> 'accel/accel-cpu-ops.h'
  accel/tcg: Do not dump NaN statistics
  hw/core/machine: Display CPU model name in 'info cpus' command
  qapi/machine: Add @qom-type field to CpuInfoFast structure
  qapi/accel: Move definitions related to accelerators in their own file
  hw/arm/xen-pvh: Remove unnecessary 'hw/xen/arch_hvm.h' header
  hw/xen/arch_hvm: Unify x86 and ARM variants

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

Conflicts:
  qapi/machine.json
  Commit 0462da9d6b ("qapi: remove trivial "Returns:" sections")
  removed trivial "Returns:". This caused a conflict with the move from
  machine.json to accelerator.json.
2025-07-16 07:13:40 -04:00
Stefan Hajnoczi
f79afdf7da vfio queue:
* Fixed vfio-user issues reported by Coverity
 * Tweaked VFIO migration with multifd to support aarch64
 * Introduced a property to override a device PCI class code
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Merge tag 'pull-vfio-20250715' of https://github.com/legoater/qemu into staging

vfio queue:

* Fixed vfio-user issues reported by Coverity
* Tweaked VFIO migration with multifd to support aarch64
* Introduced a property to override a device PCI class code

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# gpg: Signature made Tue 15 Jul 2025 11:22:08 EDT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-vfio-20250715' of https://github.com/legoater/qemu:
  vfio/migration: Max in-flight VFIO device state buffers size limit
  vfio/migration: Add x-migration-load-config-after-iter VFIO property
  vfio/pci: Introduce x-pci-class-code option
  hw/vfio-user: fix use of uninitialized variable
  hw/vfio-user: wait for proxy close correctly
  hw/vfio: fix region fd initialization
  hw/vfio-user: add Cédric Le Goater as a maintainer

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-16 07:07:44 -04:00
Stefan Hajnoczi
1c37425423 UI-related for 10.1
- [PATCH v3 0/2] ui/vnc: Do not copy z_stream
 - [PATCH v6 0/7] ui/spice: Enable gl=on option for non-local or remote clients
 - [PATCH v6 0/1] Allow injection of virtio-gpu EDID name
 - [PATCH 0/2] ui/gtk: Add keep-aspect-ratio and scale option
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Merge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging

UI-related for 10.1

- [PATCH v3 0/2] ui/vnc: Do not copy z_stream
- [PATCH v6 0/7] ui/spice: Enable gl=on option for non-local or remote clients
- [PATCH v6 0/1] Allow injection of virtio-gpu EDID name
- [PATCH 0/2] ui/gtk: Add keep-aspect-ratio and scale option

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# gpg: Signature made Tue 15 Jul 2025 02:32:06 EDT
# gpg:                using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5
# gpg:                issuer "marcandre.lureau@redhat.com"
# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full]
# gpg:                 aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full]
# Primary key fingerprint: 87A9 BD93 3F87 C606 D276  F62D DAE8 E109 7596 9CE5

* tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu:
  tpm: "qemu -tpmdev help" should return success
  ui/gtk: Add scale option
  ui/gtk: Add keep-aspect-ratio option
  hw/display: Allow injection of virtio-gpu EDID name
  ui/spice: Blit the scanout texture if its memory layout is not linear
  ui/spice: Create a new texture with linear layout when gl=on is specified
  ui/console-gl: Add a helper to create a texture with linear memory layout
  ui/spice: Add an option to submit gl_draw requests at fixed rate
  ui/spice: Add an option for users to provide a preferred video codec
  ui/spice: Enable gl=on option for non-local or remote clients
  ui/egl-helpers: Error check the fds in egl_dmabuf_export_texture()
  ui/vnc: Introduce the VncWorker type
  ui/vnc: Do not copy z_stream

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-16 07:07:05 -04:00
Philippe Mathieu-Daudé
d6c73ac306 hw/core/machine: Display CPU model name in 'info cpus' command
Display the CPU model in 'info cpus'. Example before:

 $ qemu-system-aarch64 -M xlnx-versal-virt -S -monitor stdio
 QEMU 10.0.0 monitor - type 'help' for more information
 (qemu) info cpus
 * CPU #0: thread_id=42924
   CPU #1: thread_id=42924
   CPU #2: thread_id=42924
   CPU #3: thread_id=42924
 (qemu) q

and after:

 $ qemu-system-aarch64 -M xlnx-versal-virt -S -monitor stdio
 QEMU 10.0.50 monitor - type 'help' for more information
 (qemu) info cpus
 * CPU #0: thread_id=42916 model=cortex-a72
   CPU #1: thread_id=42916 model=cortex-a72
   CPU #2: thread_id=42916 model=cortex-r5f
   CPU #3: thread_id=42916 model=cortex-r5f
 (qemu)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Tested-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <20250715090624.52377-3-philmd@linaro.org>
2025-07-15 19:28:36 +02:00
Philippe Mathieu-Daudé
6ca2eba6d3 qapi/machine: Add @qom-type field to CpuInfoFast structure
Knowing the QOM type name of a CPU can be useful,
in particular to infer its model name.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <20250715090624.52377-2-philmd@linaro.org>
2025-07-15 19:28:36 +02:00
Philippe Mathieu-Daudé
18da42ee42 qapi/accel: Move definitions related to accelerators in their own file
Extract KVM definitions from machine.json to accelerator.json.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703105540.67664-29-philmd@linaro.org>
2025-07-15 19:28:02 +02:00
Maciej S. Szmigiero
6380b0a02f vfio/migration: Add x-migration-load-config-after-iter VFIO property
This property allows configuring whether to start the config load only
after all iterables were loaded, during non-iterables loading phase.
Such interlocking is required for ARM64 due to this platform VFIO
dependency on interrupt controller being loaded first.

The property defaults to AUTO, which means ON for ARM, OFF for other
platforms.

Reviewed-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Avihai Horon <avihaih@nvidia.com>
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Link: https://lore.kernel.org/qemu-devel/0e03c60dbc91f9a9ba2516929574df605b7dfcb4.1752589295.git.maciej.szmigiero@oracle.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-15 17:11:12 +02:00
Eric Auger
1a10285665 hw/core/sysbus: Introduce sysbus_mmio_map_name() helper
Some sysbus devices have conditional mmio regions. This
happens for instance with the hw/acpi/ged device. In that case
it becomes difficult to predict which index a specific MMIO
region corresponds to when one needs to mmio map the region.
Introduce a new helper that takes the name of the region instead
of its index. If the region is not found this returns -1.
Otherwise it maps the corresponding index and returns this latter.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20250714080639.2525563-31-eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15 02:56:40 -04:00
Philippe Mathieu-Daudé
749c21cf6d qemu: Convert target_words_bigendian() to TargetInfo API
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250708215320.70426-6-philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15 02:56:39 -04:00
Philippe Mathieu-Daudé
0af00042a9 qemu/target-info: Factor target_arch() out
To keep "qemu/target-info.h" self-contained to native
types, declare target_arch() -- which returns a QAPI
type -- in "qemu/target-info-qapi.h".

No logical change.

Keeping native types in "qemu/target-info.h" is necessary
to keep building tests such tests/tcg/plugins/mem.c, as
per the comment added in commit ecbcc9ead2 ("tests/tcg:
add a system test to check memory instrumentation"):

/*
 * plugins should not include anything from QEMU aside from the
 * API header. However as this is a test plugin to exercise the
 * internals of QEMU and we want to avoid needless code duplication we
 * do so here. bswap.h is pretty self-contained although it needs a
 * few things provided by compiler.h.
 */

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20250708215320.70426-3-philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15 02:56:39 -04:00
Andrew Keesler
454f4b0f59 hw/display: Allow injection of virtio-gpu EDID name
Thanks to 72d277a7, 1ed2cb32, and others, EDID (Extended Display
Identification Data) is propagated by QEMU such that a virtual display
presents legitimate metadata (e.g., name, serial number, preferred
resolutions, etc.) to its connected guest.

This change adds the ability to specify the EDID name for a particular
virtio-vga display. Previously, every virtual display would have the same
name: "QEMU Monitor". Now, we can inject names of displays in order to test
guest behavior that is specific to display names. We provide the ability to
inject the display name from the frontend since this is guest visible
data. Furthermore, this makes it clear where N potential display outputs
would get their name from (which will be added in a future change).

Note that we have elected to use a struct here for output data for
extensibility - we intend to add per-output fields like resolution in a
future change.

It should be noted that EDID names longer than 12 bytes will be truncated
per spec (I think?).

Testing: verified that when I specified 2 outputs for a virtio-gpu with
edid_name set, the names matched those that I configured with my vnc
display.

  -display vnc=localhost:0,id=aaa,display=vga,head=0 \
  -display vnc=localhost:1,id=bbb,display=vga,head=1 \
  -device '{"driver":"virtio-vga",
            "max_outputs":2,
            "id":"vga",
            "outputs":[
              {
                 "name":"AAA"
              },
              {
                 "name":"BBB"
              }
            ]}'

Signed-off-by: Andrew Keesler <ankeesler@google.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20250709121126.2946088-2-ankeesler@google.com>
2025-07-15 10:22:33 +04:00
Li Chen
54401d5abd acpi: Add machine option to disable SPCR table
The ACPI SPCR (Serial Port Console Redirection) table allows firmware
to specify a preferred serial console device to the operating system.
On ARM64 systems, Linux by default respects this table: even if the
kernel command line does not include a hardware serial console (e.g.,
"console=ttyAMA0"), the kernel still register the serial device
referenced by SPCR as a printk console.

While this behavior is standard-compliant, it can lead to situations
where guest console behavior is influenced by platform firmware rather
than user-specified configuration. To make guest console behavior more
predictable and under user control, this patch introduces a machine
option to explicitly disable SPCR table exposure:

    -machine spcr=off

By default, the option is enabled (spcr=on), preserving existing
behavior. When disabled, QEMU will omit the SPCR table from the guest's
ACPI namespace, ensuring that only consoles explicitly declared in the
kernel command line are registered.

Signed-off-by: Li Chen <chenl311@chinatelecom.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Message-Id: <20250528105404.457729-2-me@linux.beauty>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-14 09:16:40 -04:00
Akihiko Odaki
52f45faa4f qdev-properties: Add DEFINE_PROP_ON_OFF_AUTO_BIT64()
DEFINE_PROP_ON_OFF_AUTO_BIT64() corresponds to DEFINE_PROP_ON_OFF_AUTO()
as DEFINE_PROP_BIT64() corresponds to DEFINE_PROP_BOOL(). The difference
is that DEFINE_PROP_ON_OFF_AUTO_BIT64() exposes OnOffAuto instead of
bool.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20250530-vdpa-v1-1-5af4109b1c19@daynix.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-14 05:25:34 -04:00
Fiona Ebner
eef2dd03f9 hw/core/qdev-properties-system: Add missing return in set_drive_helper()
Currently, changing the 'drive' property of e.g. a scsi-hd object will
result in an assertion failure if the aio context of the block node
it's replaced with doesn't match the current aio context:

> bdrv_replace_child_noperm: Assertion `bdrv_get_aio_context(old_bs) ==
> bdrv_get_aio_context(new_bs)' failed.

The problematic scenario is already detected, but a 'return' statement
was missing.

Cc: qemu-stable@nongnu.org
Fixes: d1a58c176a ("qdev: allow setting drive property for realized device")
Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
Message-ID: <20250523070211.280498-1-f.ebner@proxmox.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2025-06-04 18:16:34 +02:00
Stefan Hajnoczi
107215089d * Functional tests improvements
* Endianness improvements/clean-ups for the Microblaze machines
 * Remove obsolete -2.4 and -2.5 i440fx and q35 machine types and related code
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Merge tag 'pull-request-2025-05-30' of https://gitlab.com/thuth/qemu into staging

* Functional tests improvements
* Endianness improvements/clean-ups for the Microblaze machines
* Remove obsolete -2.4 and -2.5 i440fx and q35 machine types and related code

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# gpg: Signature made Fri 30 May 2025 07:45:20 EDT
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2025-05-30' of https://gitlab.com/thuth/qemu: (25 commits)
  tests/unit/test-util-sockets: fix mem-leak on error object
  hw/net/vmxnet3: Merge DeviceRealize in InstanceInit
  hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_DISABLE_PCIE definition
  hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS definition
  hw/scsi/vmw_pvscsi: Convert DeviceRealize -> InstanceInit
  hw/scsi/vmw_pvscsi: Remove PVSCSI_COMPAT_DISABLE_PCIE_BIT definition
  hw/scsi/vmw_pvscsi: Remove PVSCSI_COMPAT_OLD_PCI_CONFIGURATION definition
  hw/core/machine: Remove hw_compat_2_5[] array
  hw/nvram/fw_cfg: Remove legacy FW_CFG_ORDER_OVERRIDE
  hw/i386/x86: Remove X86MachineClass::save_tsc_khz field
  hw/i386/pc: Remove deprecated pc-q35-2.5 and pc-i440fx-2.5 machines
  hw/virtio/virtio-pci: Remove VIRTIO_PCI_FLAG_DISABLE_PCIE definition
  hw/virtio/virtio-pci: Remove VIRTIO_PCI_FLAG_MIGRATE_EXTRA definition
  hw/net/e1000: Remove unused E1000_FLAG_MAC flag
  hw/core/machine: Remove hw_compat_2_4[] array
  hw/i386/pc: Remove pc_compat_2_4[] array
  hw/i386/pc: Remove PCMachineClass::broken_reserved_end field
  hw/i386/pc: Remove deprecated pc-q35-2.4 and pc-i440fx-2.4 machines
  docs: Deprecate the qemu-system-microblazeel binary
  hw/microblaze: Remove the big-endian variants of ml605 and xlnx-zynqmp-pmu
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-05-30 11:41:13 -04:00
Stefan Hajnoczi
98721058d6 * target/i386/kvm: Intel TDX support
* target/i386/emulate: more lflags cleanups
 * meson: remove need for explicit listing of dependencies in hw_common_arch and
   target_common_arch
 * rust: small fixes
 * hpet: Reorganize register decoding to be more similar to Rust code
 * target/i386: fixes for AMD models
 * target/i386: new EPYC-Turin CPU model
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* target/i386/kvm: Intel TDX support
* target/i386/emulate: more lflags cleanups
* meson: remove need for explicit listing of dependencies in hw_common_arch and
  target_common_arch
* rust: small fixes
* hpet: Reorganize register decoding to be more similar to Rust code
* target/i386: fixes for AMD models
* target/i386: new EPYC-Turin CPU model

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# gpg: Signature made Thu 29 May 2025 03:05:00 EDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (77 commits)
  target/i386/tcg/helper-tcg: fix file references in comments
  target/i386: Add support for EPYC-Turin model
  target/i386: Update EPYC-Genoa for Cache property, perfmon-v2, RAS and SVM feature bits
  target/i386: Add couple of feature bits in CPUID_Fn80000021_EAX
  target/i386: Update EPYC-Milan CPU model for Cache property, RAS, SVM feature bits
  target/i386: Update EPYC-Rome CPU model for Cache property, RAS, SVM feature bits
  target/i386: Update EPYC CPU model for Cache property, RAS, SVM feature bits
  rust: make declaration of dependent crates more consistent
  docs: Add TDX documentation
  i386/tdx: Validate phys_bits against host value
  i386/tdx: Make invtsc default on
  i386/tdx: Don't treat SYSCALL as unavailable
  i386/tdx: Fetch and validate CPUID of TD guest
  target/i386: Print CPUID subleaf info for unsupported feature
  i386: Remove unused parameter "uint32_t bit" in feature_word_description()
  i386/cgs: Introduce x86_confidential_guest_check_features()
  i386/tdx: Define supported KVM features for TDX
  i386/tdx: Add XFD to supported bit of TDX
  i386/tdx: Add supported CPUID bits relates to XFAM
  i386/tdx: Add supported CPUID bits related to TD Attributes
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-05-30 11:41:07 -04:00
Philippe Mathieu-Daudé
667e170d2c hw/core/machine: Remove hw_compat_2_5[] array
The hw_compat_2_5[] array was only used by the pc-q35-2.5 and
pc-i440fx-2.5 machines, which got removed. Remove it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-ID: <20250512083948.39294-13-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-05-30 09:52:08 +02:00
Philippe Mathieu-Daudé
6160ce2084 hw/nvram/fw_cfg: Remove legacy FW_CFG_ORDER_OVERRIDE
The MachineClass::legacy_fw_cfg_order boolean was only used
by the pc-q35-2.5 and pc-i440fx-2.5 machines, which got
removed. Remove it along with:

- FW_CFG_ORDER_OVERRIDE_* definitions
- fw_cfg_set_order_override()
- fw_cfg_reset_order_override()
- fw_cfg_order[]
- rom_set_order_override()
- rom_reset_order_override()

Simplify CLI and pc_vga_init() / pc_nic_init().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-ID: <20250512083948.39294-12-philmd@linaro.org>
[thuth: Fix error from check_patch.pl wrt to an empty "for" loop]
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-05-30 09:52:08 +02:00
Philippe Mathieu-Daudé
60ce3f67be hw/core/machine: Remove hw_compat_2_4[] array
The hw_compat_2_4[] array was only used by the pc-q35-2.4 and
pc-i440fx-2.4 machines, which got removed. Remove it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-ID: <20250512083948.39294-6-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-05-30 09:52:08 +02:00
Pierrick Bouvier
d33717d7fc meson: remove lib{system, user}_ss aliases
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/r/20250521223414.248276-7-pierrick.bouvier@linaro.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-26 17:31:06 +02:00
Alberto Faria
5562e214e8 scsi-disk: Advertise FUA support by default
Allow the guest to submit FUA requests directly, instead of forcing it
to emulate them using a regular flush.

Signed-off-by: Alberto Faria <afaria@redhat.com>
Message-ID: <20250502121115.3613717-3-afaria@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2025-05-21 18:52:17 +02:00
Stefan Hajnoczi
5cb8b0988b target-arm queue:
* target/arm: refactoring for compile-twice changes
  * MAINTAINERS: Add an entry for the Bananapi machine
  * arm/omap: remove hard coded tabs
  * rust: pl011: Cut down amount of text quoted from PL011 TRM
  * target/arm: refactor Arm CPU class hierarchy
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Merge tag 'pull-target-arm-20250515' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * target/arm: refactoring for compile-twice changes
 * MAINTAINERS: Add an entry for the Bananapi machine
 * arm/omap: remove hard coded tabs
 * rust: pl011: Cut down amount of text quoted from PL011 TRM
 * target/arm: refactor Arm CPU class hierarchy

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# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20250515' of https://git.linaro.org/people/pmaydell/qemu-arm: (58 commits)
  target/arm/tcg/vfp_helper: compile file twice (system, user)
  target/arm/tcg/arith_helper: compile file once
  target/arm/tcg/tlb-insns: compile file once (system)
  target/arm/helper: restrict define_tlb_insn_regs to system target
  target/arm/tcg/tlb_helper: compile file twice (system, user)
  target/arm/tcg/neon_helper: compile file twice (system, user)
  target/arm/tcg/iwmmxt_helper: compile file twice (system, user)
  target/arm/tcg/hflags: compile file twice (system, user)
  target/arm/tcg/crypto_helper: compile file once
  target/arm/tcg/vec_internal: use forward declaration for CPUARMState
  target/arm/machine: compile file once (system)
  target/arm/kvm-stub: add missing stubs
  target/arm/machine: move cpu_post_load kvm bits to kvm_arm_cpu_post_load function
  target/arm/machine: remove TARGET_AARCH64 from migration state
  target/arm/machine: reduce migration include to avoid target specific definitions
  target/arm/kvm-stub: compile file once (system)
  target/arm/meson: accelerator files are not needed in user mode
  target/arm/ptw: compile file once (system)
  target/arm/ptw: replace TARGET_AARCH64 by CONFIG_ATOMIC64 from arm_casq_ptw
  target/arm/ptw: replace target_ulong with int64_t
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-05-15 13:42:21 -04:00
Stefan Hajnoczi
2159606408 virtio,pci,pc: fixes, features
vhost-scsi now supports scsi hotplug
 cxl gained a bag of new operations, motably media operations
 virtio-net now supports SR-IOV emulation
 pci-testdev now supports backing memory bar with host memory
 amd iommu now supports migration
 
 fixes all over the place
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging

virtio,pci,pc: fixes, features

vhost-scsi now supports scsi hotplug
cxl gained a bag of new operations, motably media operations
virtio-net now supports SR-IOV emulation
pci-testdev now supports backing memory bar with host memory
amd iommu now supports migration

fixes all over the place

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

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# gpg: Signature made Wed 14 May 2025 07:49:25 EDT
# gpg:                using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg:                issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (27 commits)
  hw/i386/amd_iommu: Allow migration when explicitly create the AMDVI-PCI device
  hw/i386/amd_iommu: Isolate AMDVI-PCI from amd-iommu device to allow full control over the PCI device creation
  intel_iommu: Take locks when looking for and creating address spaces
  intel_iommu: Use BQL_LOCK_GUARD to manage cleanup automatically
  virtio: Move virtio_reset()
  virtio: Call set_features during reset
  vhost-scsi: support VIRTIO_SCSI_F_HOTPLUG
  vhost-user: return failure if backend crash when live migration
  vhost: return failure if stop virtqueue failed in vhost_dev_stop
  system/runstate: add VM state change cb with return value
  pci-testdev.c: Add membar-backed option for backing membar
  pcie_sriov: Make a PCI device with user-created VF ARI-capable
  docs: Document composable SR-IOV device
  virtio-net: Implement SR-IOV VF
  virtio-pci: Implement SR-IOV PF
  pcie_sriov: Allow user to create SR-IOV device
  pcie_sriov: Check PCI Express for SR-IOV PF
  pcie_sriov: Ensure PF and VF are mutually exclusive
  hw/pci: Fix SR-IOV VF number calculation
  hw/pci: Do not add ROM BAR for SR-IOV VF
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-05-15 13:41:56 -04:00
Peter Maydell
b4ae54989b hw/core/cpu-common: Don't init gdbstub until cpu_exec_realizefn()
Currently we call gdb_init_cpu() in cpu_common_initfn(), which is
very early in the CPU object's init->realize creation sequence.  In
particular this happens before the architecture-specific subclass's
init fn has even run.  This means that gdb_init_cpu() can only do
things that depend strictly on the class, not on the object, because
the CPUState* that it is passed is currently half-initialized.

In commit a1f728ecc9 we accidentally broke this rule, by adding
a call to the gdb_get_core_xml_file method which takes the CPUState.
At the moment we get away with this because the only implementation
doesn't actually look at the pointer it is passed.  However the whole
reason we created that method was so that we could make the "which
XML file?" decision based on a property of the CPU object, and we
currently can't change the Arm implementation of the method to do
what we want without causing wrong behaviour or a crash.

The ordering restrictions here are:
 * we must call gdb_init_cpu before:
   - any call to gdb_register_coprocessor()
   - any use of the gdb_num_regs field (this is only used
     in code that's about to call gdb_register_coprocessor()
     and wants to know the first register number of the
     set of registers it's about to add)
 * we must call gdb_init_cpu after CPU properties have been
   set, which is to say somewhere in realize

The function cpu_exec_realizefn() meets both of these requirements,
as it is called by the architecture-specific CPU realize function
early in realize, before any calls ot gdb_register_coprocessor().
Move the gdb_init_cpu() call to there.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250429132200.605611-4-peter.maydell@linaro.org
2025-05-14 14:29:45 +01:00
Haoqian He
e0f300b36d system/runstate: add VM state change cb with return value
This patch adds the new VM state change cb type `VMChangeStateHandlerWithRet`,
which has return value for `VMChangeStateEntry`.

Thus, we can register a new VM state change cb with return value for device.
Note that `VMChangeStateHandler` and `VMChangeStateHandlerWithRet` are mutually
exclusive and cannot be provided at the same time.

This patch is the pre patch for 'vhost-user: return failure if backend crashes
when live migration', which makes the live migration aware of the loss of
connection with the vhost-user backend and aborts the live migration.

Virtio device will use VMChangeStateHandlerWithRet.

Signed-off-by: Haoqian He <haoqian.he@smartx.com>
Message-Id: <20250416024729.3289157-2-haoqian.he@smartx.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-05-14 05:39:14 -04:00
Gustavo Romero
f6527ddff8 hw/core/machine: Fix indentation
Fix indentation for some elements in the hardware compat arrays.

Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2025-05-09 23:49:26 +03:00
Stefan Hajnoczi
06b40d250e Various patches loosely related to single binary work:
- Replace cpu_list() definition by CPUClass::list_cpus() callback
 - Remove few MO_TE definitions on Hexagon / X86 targets
 - Remove target_ulong uses in  ARMMMUFaultInfo and ARM CPUWatchpoint
 - Remove DEVICE_HOST_ENDIAN definition
 - Evaluate TARGET_BIG_ENDIAN at compile time and use target_needs_bswap() more
 - Rename target_words_bigendian() as target_big_endian()
 - Convert target_name() and target_cpu_type() to TargetInfo API
 - Constify QOM TypeInfo class_data/interfaces fields
 - Get default_cpu_type calling machine_class_default_cpu_type()
 - Correct various uses of GLibCompareDataFunc prototype
 - Simplify ARM/Aarch64 gdb_get_core_xml_file() handling a bit
 - Move device tree files in their own pc-bios/dtb/ subdir
 - Correctly check strchrnul() symbol availability on macOS SDK
 - Move target-agnostic methods out of cpu-target.c and accel-target.c
 - Unmap canceled USB XHCI packet
 - Use deposit/extract API in designware model
 - Fix MIPS16e translation
 - Few missing header fixes
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Merge tag 'single-binary-20250425' of https://github.com/philmd/qemu into staging

Various patches loosely related to single binary work:

- Replace cpu_list() definition by CPUClass::list_cpus() callback
- Remove few MO_TE definitions on Hexagon / X86 targets
- Remove target_ulong uses in  ARMMMUFaultInfo and ARM CPUWatchpoint
- Remove DEVICE_HOST_ENDIAN definition
- Evaluate TARGET_BIG_ENDIAN at compile time and use target_needs_bswap() more
- Rename target_words_bigendian() as target_big_endian()
- Convert target_name() and target_cpu_type() to TargetInfo API
- Constify QOM TypeInfo class_data/interfaces fields
- Get default_cpu_type calling machine_class_default_cpu_type()
- Correct various uses of GLibCompareDataFunc prototype
- Simplify ARM/Aarch64 gdb_get_core_xml_file() handling a bit
- Move device tree files in their own pc-bios/dtb/ subdir
- Correctly check strchrnul() symbol availability on macOS SDK
- Move target-agnostic methods out of cpu-target.c and accel-target.c
- Unmap canceled USB XHCI packet
- Use deposit/extract API in designware model
- Fix MIPS16e translation
- Few missing header fixes

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# gpg: Signature made Fri 25 Apr 2025 11:26:55 EDT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'single-binary-20250425' of https://github.com/philmd/qemu: (58 commits)
  qemu: Convert target_name() to TargetInfo API
  accel: Move target-agnostic code from accel-target.c -> accel-common.c
  accel: Make AccelCPUClass structure target-agnostic
  accel: Include missing 'qemu/accel.h' header in accel-internal.h
  accel: Implement accel_init_ops_interfaces() for both system/user mode
  cpus: Move target-agnostic methods out of cpu-target.c
  cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type()
  qemu: Introduce target_cpu_type()
  qapi: Rename TargetInfo structure as QemuTargetInfo
  hw/microblaze: Evaluate TARGET_BIG_ENDIAN at compile time
  hw/mips: Evaluate TARGET_BIG_ENDIAN at compile time
  target/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time
  target/mips: Check CPU endianness at runtime using env_is_bigendian()
  accel/kvm: Use target_needs_bswap()
  linux-user/elfload: Use target_needs_bswap()
  target/hexagon: Include missing 'accel/tcg/getpc.h'
  accel/tcg: Correct list of included headers in tcg-stub.c
  system/kvm: make functions accessible from common code
  meson: Use osdep_prefix for strchrnul()
  meson: Share common C source prefixes
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-27 12:47:16 -04:00
Philippe Mathieu-Daudé
3d881164d4 qemu: Convert target_name() to TargetInfo API
Have target_name() be a target-agnostic method, dispatching
to a per-target TargetInfo singleton structure.
By default a stub singleton is used. No logical change
expected.

Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424222112.36194-3-philmd@linaro.org>
2025-04-25 17:09:58 +02:00
Philippe Mathieu-Daudé
2492008d0d cpus: Move target-agnostic methods out of cpu-target.c
Various methods of cpu-target.c don't use any target-specific
knowledge at all and can be built once in the target-agnostic
cpu-common.c file.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250417165430.58213-4-philmd@linaro.org>
2025-04-25 17:09:58 +02:00
Philippe Mathieu-Daudé
0c9d76f519 qapi: Rename TargetInfo structure as QemuTargetInfo
The QAPI-generated 'TargetInfo' structure name is only used
in a single file. We want to heavily use another structure
similarly named. Rename the QAPI one, since structure names
are not part of the public API.

Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20250422145502.70770-2-philmd@linaro.org>
2025-04-25 17:09:58 +02:00
Kohei Tokunaga
604ac1d87b hw/core/loader: Fix type conflict of GLib function pointers
On Emscripten, function pointer casts can result in runtime failures due to
strict function signature checks. This affects the use of g_list_sort and
g_slist_sort, which internally perform function pointer casts that are not
supported by Emscripten. To avoid these issues, g_list_sort_with_data and
g_slist_sort_with_data should be used instead, as they do not rely on
function pointer casting.

Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <26dfe9191154ca65dca6ef51ce768ad2a0c30d5f.1745295397.git.ktokunaga.mail@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-25 17:00:42 +02:00
Philippe Mathieu-Daudé
b939b8e42a exec: Rename target_words_bigendian() -> target_big_endian()
In commit 98ed8ecfc9 ("exec: introduce target_words_bigendian()
helper") target_words_bigendian() was matching the definition it
was depending on (TARGET_WORDS_BIGENDIAN). Later in commit
ee3eb3a7ce ("Replace TARGET_WORDS_BIGENDIAN") the definition was
renamed as TARGET_BIG_ENDIAN but we didn't update the helper.
Do it now mechanically using:

  $ sed -i -e s/target_words_bigendian/target_big_endian/g \
        $(git grep -wl target_words_bigendian)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20250417210025.68322-1-philmd@linaro.org>
2025-04-25 17:00:42 +02:00
Philippe Mathieu-Daudé
d5f241834b hw/core: Get default_cpu_type calling machine_class_default_cpu_type()
Since commit 62b4a227a3 the default cpu type can come from the
valid_cpu_types[] array. Call the machine_class_default_cpu_type()
instead of accessing MachineClass::default_cpu_type field.

Cc: qemu-stable@nongnu.org
Fixes: 62b4a227a3 ("hw/core: Add machine_class_default_cpu_type()")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250422084114.39499-1-philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Philippe Mathieu-Daudé
2cd09e47aa qom: Make InterfaceInfo[] uses const
Mechanical change using:

  $ sed -i -E 's/\(InterfaceInfo.?\[/\(const InterfaceInfo\[/g' \
              $(git grep -lE '\(InterfaceInfo.?\[\]\)')

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250424194905.82506-7-philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Philippe Mathieu-Daudé
12d1a768bd qom: Have class_init() take a const data argument
Mechanical change using gsed, then style manually adapted
to pass checkpatch.pl script.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-4-philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Philippe Mathieu-Daudé
f1fa787b92 qom: Have class_base_init() take a const data argument
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-3-philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Cédric Le Goater
499e53cce9 vfio: Introduce new files for VFIORegion definitions and declarations
Gather all VFIORegion related declarations and definitions into their
own files to reduce exposure of VFIO internals in "hw/vfio/vfio-common.h".
They were introduced for 'vfio-platform' support in commits
db0da029a1 ("vfio: Generalize region support") and a664477db8
("hw/vfio/pci: Introduce VFIORegion").

To be noted that the 'vfio-platform' devices have been deprecated and
will be removed in QEMU 10.2. Until then, make the declarations
available externally for 'sysbus-fdt.c'.

Cc: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Link: https://lore.kernel.org/qemu-devel/20250326075122.1299361-12-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-04-25 09:01:37 +02:00
Stefan Hajnoczi
019fbfa4bc Miscellaneous patches for 2025-04-24
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Merge tag 'pull-misc-2025-04-24' of https://repo.or.cz/qemu/armbru into staging

Miscellaneous patches for 2025-04-24

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# gpg: Signature made Thu 24 Apr 2025 03:52:54 EDT
# gpg:                using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg:                issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* tag 'pull-misc-2025-04-24' of https://repo.or.cz/qemu/armbru:
  cleanup: Drop pointless label at end of function
  cleanup: Drop pointless return at end of function
  cleanup: Re-run return_directly.cocci

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-24 13:44:57 -04:00
Markus Armbruster
8a2b516ba2 cleanup: Drop pointless return at end of function
A few functions now end with a label.  The next commit will clean them
up.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250407082643.2310002-3-armbru@redhat.com>
[Straightforward conflict with commit 988ad4cceb (hw/loongarch/virt:
Fix cpuslot::cpu set at last in virt_cpu_plug()) resolved]
2025-04-24 09:33:42 +02:00
Richard Henderson
161f5bc8e9 include/exec: Split out icount.h
Split icount stuff from system/cpu-timers.h.
There are 17 files which only require icount.h, 7 that only
require cpu-timers.h, and 7 that require both.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 14:08:44 -07:00
Richard Henderson
53d2354cec hw/core: Move unconditional files to libsystem_ss, libuser_ss
Many of the headers used by these require CONFIG_USER_ONLY.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 14:08:39 -07:00
Richard Henderson
dfc56946a7 include/system: Move exec/address-spaces.h to system/address-spaces.h
Convert the existing includes with sed.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 14:08:21 -07:00
Richard Henderson
8be545ba5a include/system: Move exec/memory.h to system/memory.h
Convert the existing includes with

  sed -i ,exec/memory.h,system/memory.h,g

Move the include within cpu-all.h into a !CONFIG_USER_ONLY block.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 14:08:21 -07:00
Cornelia Huck
4a00039c46 hw: add compat machines for 10.1
Add 10.1 machine types for arm/i440fx/m68k/q35/s390x/spapr.

Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20250414094543.221241-1-cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-04-23 07:51:25 +02:00
Philippe Mathieu-Daudé
76720b6e85 qapi/machine: Make @dump-skeys command generic
Reduce misc-target.json by one target specific command.

Error message is returned for machines not implementing
TYPE_DUMP_SKEYS_INTERFACE:

  $ qemu-system-aarch64 -M virt -S -qmp stdio
  {"QMP": {"version": {"qemu": {"micro": 50, "major": 9}}, "capabilities": ["oob"]}}
  { "execute": "qmp_capabilities" }
  {"return": {}}
  { "execute": "dump-skeys", "arguments": { "filename": "/tmp/foo" }  }
  {"error": {"class": "GenericError", "desc": "Storage keys information not available for this architecture"}}

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250310151414.11550-5-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-04-23 07:51:25 +02:00
Joel Stanley
15a9fe6e35 hw/core/machine: Fix -machine dumpdtb=file.dtb
In commit 8fd2518ef2 ("hw: Centralize handling of -machine dumpdtb
option") the call to dump was moved with respect to the init of the
machine.  This resulted in the device tree missing parts of the machine
description, depending on how they construct their device tree.

The arm virt machine is missing some PSCI nodes, while the riscv one
is missing most of its content.

Move the dump to after the notifiers have been run, allowing
virt_machine_done to be called and the device tree to be fully
populated.

Fixes: 8fd2518ef2 ("hw: Centralize handling of -machine dumpdtb option")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250401041509.719153-1-joel@jms.id.au>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-08 20:46:07 +02:00
Paolo Bonzini
134ab17fff load_aout: replace bswap_needed with big_endian
Targets know whether they are big-endian more than they know if
the endianness is different from the host: the former is mostly
a constant, at least in machine creation code, while the latter
has to be computed with TARGET_BIG_ENDIAN != HOST_BIG_ENDIAN or
something like that.

load_aout, however, takes a "bswap_needed" argument.  Replace
it with a "big_endian" argument; even though all users are
big-endian, it is cheap enough to keep the optional swapping
functionality even for little-endian boards.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-03-21 12:51:16 +01:00