Proxmox-Port/qemu
1
0
Fork 0
mirror of https://github.com/qemu/qemu.git synced 2025-08-16 06:43:21 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

error: Strip trailing '\n' from error string arguments (again)

Browse Source 
Tracked down with scripts/coccinelle/err-bad-newline.cocci.

Cc: Peter Xu <peterx@redhat.com>
Cc: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20200722084048.1726105-3-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Peter Xu <peterx@redhat.com>
This commit is contained in:
Markus Armbruster 2020-07-22 10:40:46 +02:00
parent cb3fa1e4c0
commit ff5b5d5b6d
2 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
hw/i386/intel_iommu.c
View File

@ -2356,7 +2356,7 @@ static bool vtd_process_iotlb_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc)
if ((inv_desc->lo & VTD_INV_DESC_IOTLB_RSVD_LO) || if ((inv_desc->lo & VTD_INV_DESC_IOTLB_RSVD_LO) ||
(inv_desc->hi & VTD_INV_DESC_IOTLB_RSVD_HI)) { (inv_desc->hi & VTD_INV_DESC_IOTLB_RSVD_HI)) {
error_report_once("%s: invalid iotlb inv desc: hi=0x%"PRIx64 error_report_once("%s: invalid iotlb inv desc: hi=0x%"PRIx64
", lo=0x%"PRIx64" (reserved bits unzero)\n", ", lo=0x%"PRIx64" (reserved bits unzero)",
__func__, inv_desc->hi, inv_desc->lo); __func__, inv_desc->hi, inv_desc->lo);
return false; return false;
} }
@ -2377,7 +2377,7 @@ static bool vtd_process_iotlb_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc)
am = VTD_INV_DESC_IOTLB_AM(inv_desc->hi); am = VTD_INV_DESC_IOTLB_AM(inv_desc->hi);
if (am > VTD_MAMV) { if (am > VTD_MAMV) {
error_report_once("%s: invalid iotlb inv desc: hi=0x%"PRIx64 error_report_once("%s: invalid iotlb inv desc: hi=0x%"PRIx64
", lo=0x%"PRIx64" (am=%u > VTD_MAMV=%u)\n", ", lo=0x%"PRIx64" (am=%u > VTD_MAMV=%u)",
__func__, inv_desc->hi, inv_desc->lo, __func__, inv_desc->hi, inv_desc->lo,
am, (unsigned)VTD_MAMV); am, (unsigned)VTD_MAMV);
return false; return false;
@ -2387,7 +2387,7 @@ static bool vtd_process_iotlb_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc)
default: default:
error_report_once("%s: invalid iotlb inv desc: hi=0x%"PRIx64 error_report_once("%s: invalid iotlb inv desc: hi=0x%"PRIx64
", lo=0x%"PRIx64" (type mismatch: 0x%llx)\n", ", lo=0x%"PRIx64" (type mismatch: 0x%llx)",
__func__, inv_desc->hi, inv_desc->lo, __func__, inv_desc->hi, inv_desc->lo,
inv_desc->lo & VTD_INV_DESC_IOTLB_G); inv_desc->lo & VTD_INV_DESC_IOTLB_G);
return false; return false;

2
target/ppc/mmu-hash64.c
View File

@ -859,7 +859,7 @@ static int build_vrma_slbe(PowerPCCPU *cpu, ppc_slb_t *slb)
} }
error_report("Bad page size encoding in LPCR[VRMASD]; LPCR=0x" error_report("Bad page size encoding in LPCR[VRMASD]; LPCR=0x"
TARGET_FMT_lx"\n", lpcr); TARGET_FMT_lx, lpcr);
return -1; return -1;
} }