physmem: Restrict TCG IOTLB code to TCG accel

Restrict iotlb_to_section(), address_space_translate_for_iotlb()
and memory_region_section_get_iotlb() to TCG. Declare them in
the new "accel/tcg/iommu.h" header. Declare iotlb_to_section()
using the MemoryRegionSection typedef.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-12-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2025-04-24 22:24:10 +02:00 committed by Richard Henderson
parent 1381ea53a8
commit f12b717717
5 changed files with 48 additions and 27 deletions

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@ -168,7 +168,7 @@ F: include/exec/helper*.h.inc
F: include/exec/helper-info.c.inc
F: include/exec/page-protection.h
F: include/system/tcg.h
F: include/accel/tcg/cpu-ops.h
F: include/accel/tcg/
F: host/include/*/host/cpuinfo.h
F: util/cpuinfo-*.c
F: include/tcg/

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@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "qemu/main-loop.h"
#include "accel/tcg/cpu-ops.h"
#include "accel/tcg/iommu.h"
#include "exec/exec-all.h"
#include "exec/page-protection.h"
#include "system/memory.h"

41
include/accel/tcg/iommu.h Normal file
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@ -0,0 +1,41 @@
/*
* TCG IOMMU translations.
*
* Copyright (c) 2003 Fabrice Bellard
* SPDX-License-Identifier: LGPL-2.1-or-later
*/
#ifndef ACCEL_TCG_IOMMU_H
#define ACCEL_TCG_IOMMU_H
#ifdef CONFIG_USER_ONLY
#error Cannot include accel/tcg/iommu.h from user emulation
#endif
#include "exec/hwaddr.h"
#include "exec/memattrs.h"
/**
* iotlb_to_section:
* @cpu: CPU performing the access
* @index: TCG CPU IOTLB entry
*
* Given a TCG CPU IOTLB entry, return the MemoryRegionSection that
* it refers to. @index will have been initially created and returned
* by memory_region_section_get_iotlb().
*/
MemoryRegionSection *iotlb_to_section(CPUState *cpu,
hwaddr index, MemTxAttrs attrs);
MemoryRegionSection *address_space_translate_for_iotlb(CPUState *cpu,
int asidx,
hwaddr addr,
hwaddr *xlat,
hwaddr *plen,
MemTxAttrs attrs,
int *prot);
hwaddr memory_region_section_get_iotlb(CPUState *cpu,
MemoryRegionSection *section);
#endif

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@ -21,7 +21,6 @@
#define EXEC_ALL_H
#include "exec/hwaddr.h"
#include "exec/memattrs.h"
#include "exec/mmu-access-type.h"
#include "exec/vaddr.h"
@ -121,29 +120,4 @@ int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size,
#endif /* !CONFIG_USER_ONLY */
#endif /* CONFIG_TCG */
#if !defined(CONFIG_USER_ONLY)
/**
* iotlb_to_section:
* @cpu: CPU performing the access
* @index: TCG CPU IOTLB entry
*
* Given a TCG CPU IOTLB entry, return the MemoryRegionSection that
* it refers to. @index will have been initially created and returned
* by memory_region_section_get_iotlb().
*/
struct MemoryRegionSection *iotlb_to_section(CPUState *cpu,
hwaddr index, MemTxAttrs attrs);
#endif
#if !defined(CONFIG_USER_ONLY)
MemoryRegionSection *
address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
hwaddr *xlat, hwaddr *plen,
MemTxAttrs attrs, int *prot);
hwaddr memory_region_section_get_iotlb(CPUState *cpu,
MemoryRegionSection *section);
#endif
#endif

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@ -29,6 +29,7 @@
#ifdef CONFIG_TCG
#include "accel/tcg/cpu-ops.h"
#include "accel/tcg/iommu.h"
#endif /* CONFIG_TCG */
#include "exec/exec-all.h"
@ -587,6 +588,8 @@ MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat,
return mr;
}
#ifdef CONFIG_TCG
typedef struct TCGIOMMUNotifier {
IOMMUNotifier n;
MemoryRegion *mr;
@ -771,6 +774,8 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu,
return section - d->map.sections;
}
#endif /* CONFIG_TCG */
void cpu_address_space_init(CPUState *cpu, int asidx,
const char *prefix, MemoryRegion *mr)
{