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target/mips: Do not initialize MT registers if MT ASE absent

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Do not initialize MT-related config registers if the MT ASE
is not present. As some functions access the 'mvp' structure,
we still zero-allocate it.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201204222622.2743175-4-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2020-12-02 18:53:20 +01:00
parent 17c2c320f3
commit ecc268e7c2
1 changed files with 4 additions and 0 deletions
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4
target/mips/translate_init.c.inc
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@ -993,6 +993,10 @@ static void mvp_init(CPUMIPSState *env)
{ {
env->mvp = g_malloc0(sizeof(CPUMIPSMVPContext)); env->mvp = g_malloc0(sizeof(CPUMIPSMVPContext));
if (!ase_mt_available(env)) {
return;
}
/* MVPConf1 implemented, TLB sharable, no gating storage support, /* MVPConf1 implemented, TLB sharable, no gating storage support,
programmable cache partitioning implemented, number of allocatable programmable cache partitioning implemented, number of allocatable
and shareable TLB entries, MVP has allocatable TCs, 2 VPEs and shareable TLB entries, MVP has allocatable TCs, 2 VPEs