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hw/i2c/imx_i2c: Convert DPRINTF() to trace events
Also print the QOM canonical path when tracing which allows for distinguishing the many instances a typical i.MX SoC has. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-ID: <20250111183711.2338-12-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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@ -25,18 +25,7 @@
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#include "hw/i2c/i2c.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#ifndef DEBUG_IMX_I2C
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#define DEBUG_IMX_I2C 0
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#endif
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#define DPRINTF(fmt, args...) \
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do { \
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if (DEBUG_IMX_I2C) { \
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fprintf(stderr, "[%s]%s: " fmt , TYPE_IMX_I2C, \
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__func__, ##args); \
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} \
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} while (0)
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#include "trace.h"
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static const char *imx_i2c_get_regname(unsigned offset)
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{
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@ -152,8 +141,8 @@ static uint64_t imx_i2c_read(void *opaque, hwaddr offset,
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break;
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}
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DPRINTF("read %s [0x%" HWADDR_PRIx "] -> 0x%02x\n",
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imx_i2c_get_regname(offset), offset, value);
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trace_imx_i2c_read(DEVICE(s)->canonical_path, imx_i2c_get_regname(offset),
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offset, value);
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return (uint64_t)value;
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}
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@ -163,8 +152,8 @@ static void imx_i2c_write(void *opaque, hwaddr offset,
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{
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IMXI2CState *s = IMX_I2C(opaque);
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DPRINTF("write %s [0x%" HWADDR_PRIx "] <- 0x%02x\n",
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imx_i2c_get_regname(offset), offset, (int)value);
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trace_imx_i2c_read(DEVICE(s)->canonical_path, imx_i2c_get_regname(offset),
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offset, value);
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value &= 0xff;
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@ -56,3 +56,8 @@ npcm7xx_smbus_recv_fifo(const char *id, uint8_t received, uint8_t expected) "%s
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pca954x_write_bytes(uint8_t value) "PCA954X write data: 0x%02x"
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pca954x_read_data(uint8_t value) "PCA954X read data: 0x%02x"
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# imx_i2c.c
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imx_i2c_read(const char *id, const char *reg, uint64_t ofs, uint64_t value) "%s:[%s (0x%" PRIx64 ")] -> 0x%02" PRIx64
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imx_i2c_write(const char *id, const char *reg, uint64_t ofs, uint64_t value) "%s:[%s (0x%" PRIx64 ")] <- 0x%02" PRIx64
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