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	target/arm: Implement MVE VMAXA, VMINA
Implement the MVE VMAXA and VMINA insns, which take the absolute value of the signed elements in the input vector and then accumulate the unsigned max or min into the destination vector. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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				| @ -84,6 +84,14 @@ DEF_HELPER_FLAGS_3(mve_vqnegb, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
| DEF_HELPER_FLAGS_3(mve_vqnegh, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
| DEF_HELPER_FLAGS_3(mve_vqnegw, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
| 
 | ||||
| DEF_HELPER_FLAGS_3(mve_vmaxab, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
| DEF_HELPER_FLAGS_3(mve_vmaxah, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
| DEF_HELPER_FLAGS_3(mve_vmaxaw, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
| 
 | ||||
| DEF_HELPER_FLAGS_3(mve_vminab, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
| DEF_HELPER_FLAGS_3(mve_vminah, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
| DEF_HELPER_FLAGS_3(mve_vminaw, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
| 
 | ||||
| DEF_HELPER_FLAGS_3(mve_vmovnbb, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
| DEF_HELPER_FLAGS_3(mve_vmovnbh, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
| DEF_HELPER_FLAGS_3(mve_vmovntb, TCG_CALL_NO_WG, void, env, ptr, ptr) | ||||
|  | ||||
| @ -156,6 +156,8 @@ VMUL             1110 1111 0 . .. ... 0 ... 0 1001 . 1 . 1 ... 0 @2op | ||||
|   VQMOVUNB       111 0 1110 0 . 11 .. 01 ... 0 1110 1 0 . 0 ... 1 @1op | ||||
|   VQMOVN_BS      111 0 1110 0 . 11 .. 11 ... 0 1110 0 0 . 0 ... 1 @1op | ||||
| 
 | ||||
|   VMAXA          111 0 1110 0 . 11 .. 11 ... 0 1110 1 0 . 0 ... 1 @1op | ||||
| 
 | ||||
|   VMULH_S        111 0 1110 0 . .. ...1 ... 0 1110 . 0 . 0 ... 1 @2op | ||||
| } | ||||
| 
 | ||||
| @ -176,6 +178,8 @@ VMUL             1110 1111 0 . .. ... 0 ... 0 1001 . 1 . 1 ... 0 @2op | ||||
|   VQMOVUNT       111 0 1110 0 . 11 .. 01 ... 1 1110 1 0 . 0 ... 1 @1op | ||||
|   VQMOVN_TS      111 0 1110 0 . 11 .. 11 ... 1 1110 0 0 . 0 ... 1 @1op | ||||
| 
 | ||||
|   VMINA          111 0 1110 0 . 11 .. 11 ... 1 1110 1 0 . 0 ... 1 @1op | ||||
| 
 | ||||
|   VRMULH_S       111 0 1110 0 . .. ...1 ... 1 1110 . 0 . 0 ... 1 @2op | ||||
| } | ||||
| 
 | ||||
|  | ||||
| @ -2237,3 +2237,29 @@ DO_1OP_SAT(vqabsw, 4, int32_t, DO_VQABS_W) | ||||
| DO_1OP_SAT(vqnegb, 1, int8_t, DO_VQNEG_B) | ||||
| DO_1OP_SAT(vqnegh, 2, int16_t, DO_VQNEG_H) | ||||
| DO_1OP_SAT(vqnegw, 4, int32_t, DO_VQNEG_W) | ||||
| 
 | ||||
| /*
 | ||||
|  * VMAXA, VMINA: vd is unsigned; vm is signed, and we take its | ||||
|  * absolute value; we then do an unsigned comparison. | ||||
|  */ | ||||
| #define DO_VMAXMINA(OP, ESIZE, STYPE, UTYPE, FN)                        \ | ||||
|     void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm)         \ | ||||
|     {                                                                   \ | ||||
|         UTYPE *d = vd;                                                  \ | ||||
|         STYPE *m = vm;                                                  \ | ||||
|         uint16_t mask = mve_element_mask(env);                          \ | ||||
|         unsigned e;                                                     \ | ||||
|         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \ | ||||
|             UTYPE r = DO_ABS(m[H##ESIZE(e)]);                           \ | ||||
|             r = FN(d[H##ESIZE(e)], r);                                  \ | ||||
|             mergemask(&d[H##ESIZE(e)], r, mask);                        \ | ||||
|         }                                                               \ | ||||
|         mve_advance_vpt(env);                                           \ | ||||
|     } | ||||
| 
 | ||||
| DO_VMAXMINA(vmaxab, 1, int8_t, uint8_t, DO_MAX) | ||||
| DO_VMAXMINA(vmaxah, 2, int16_t, uint16_t, DO_MAX) | ||||
| DO_VMAXMINA(vmaxaw, 4, int32_t, uint32_t, DO_MAX) | ||||
| DO_VMAXMINA(vminab, 1, int8_t, uint8_t, DO_MIN) | ||||
| DO_VMAXMINA(vminah, 2, int16_t, uint16_t, DO_MIN) | ||||
| DO_VMAXMINA(vminaw, 4, int32_t, uint32_t, DO_MIN) | ||||
|  | ||||
| @ -277,6 +277,8 @@ DO_1OP(VABS, vabs) | ||||
| DO_1OP(VNEG, vneg) | ||||
| DO_1OP(VQABS, vqabs) | ||||
| DO_1OP(VQNEG, vqneg) | ||||
| DO_1OP(VMAXA, vmaxa) | ||||
| DO_1OP(VMINA, vmina) | ||||
| 
 | ||||
| /* Narrowing moves: only size 0 and 1 are valid */ | ||||
| #define DO_VMOVN(INSN, FN) \ | ||||
|  | ||||
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