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trivial patches for 2025-05-09

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Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging

trivial patches for 2025-05-09

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# gpg: Signature made Fri 09 May 2025 16:52:20 EDT
# gpg:                using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478
# gpg: Good signature from "Michael Tokarev <mjt@debian.org>" [unknown]
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>" [unknown]
# gpg:                 aka "Michael Tokarev <mjt@tls.msk.ru>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199  28F1 61AD 3D98 ECDF 2C8E
#      Subkey fingerprint: 64AA 2AB5 31D5 6903 366B  FEF9 82AA 4A24 3B1E 9478

* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (21 commits)
  docs/devel/testing/functional: Fix typo
  docs: replace `-hda` with `-drive` & update `root=` kernel parameter
  qapi/machine-target.json: fix "in in" typo in comment
  hw/display/apple-gfx.m: fix "in in" typo in comment
  qapi/qom.json: fix "the the" typo in comment
  include/hw/xen/interface/io/blkif.h: fix "the the" typo in comment
  include/exec/cpu-common.h: fix "the the" typo in comment
  hw/xen/xen-hvm-common.c: fix "the the" typo in comment
  block.c: fix "the the" typo in comment
  linux-user/mmap.c: fix "of of" typo in comment
  hw/acpi/pcihp: Fix typo in function name
  hw/pci-host/gpex-acpi: Fix typo in comment
  hw/net/e1000: Remove stray empty comment in header
  qom/object: Fix typo in comment
  hw/core/machine: Fix indentation
  hw/i386/acpi-build: Fix typo in function name
  hw/acpi/ich9: Remove ICH9_DEBUG macro
  hw/i386/acpi-build: Update document reference
  hw/i386/acpi-build: Fix typo and grammar in comment
  hw/isa/ich9: Remove stray empty comment
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi 2025-05-12 11:11:27 -04:00
commit a28b0f857e
24 changed files with 36 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
block.c
View File

@ -3153,7 +3153,7 @@ bdrv_attach_child_common(BlockDriverState *child_bs,
* stop new requests from coming in. This is fine, we don't care about the
* old requests here, they are not for this child. If another place enters a
* drain section for the same parent, but wants it to be fully quiesced, it
* will not run most of the the code in .drained_begin() again (which is not
* will not run most of the code in .drained_begin() again (which is not
* a problem, we already did this), but it will still poll until the parent
* is fully quiesced, so it will not be negatively affected either.
*/

2
docs/devel/testing/functional.rst
View File

@ -274,7 +274,7 @@ speed mode in the meson.build file, while the "quick" speed mode is
fine for functional tests that can be run without downloading files.
``make check`` then only runs the quick functional tests along with
the other quick tests from the other test suites. If you choose to
run only run ``make check-functional``, the "thorough" tests will be
run only ``make check-functional``, the "thorough" tests will be
executed, too. And to run all functional tests along with the others,
you can use something like::

2
docs/system/gdb.rst
View File

@ -20,7 +20,7 @@ connection, use the ``-gdb dev`` option instead of ``-s``. See
.. parsed-literal::
|qemu_system| -s -S -kernel bzImage -hda rootdisk.img -append "root=/dev/hda"
|qemu_system| -s -S -kernel bzImage -drive file=rootdisk.img,format=raw -append "root=/dev/sda"
QEMU will launch but will silently wait for gdb to connect.

6
docs/system/linuxboot.rst
View File

@ -11,7 +11,7 @@ The syntax is:
.. parsed-literal::
|qemu_system| -kernel bzImage -hda rootdisk.img -append "root=/dev/hda"
|qemu_system| -kernel bzImage -drive file=rootdisk.img,format=raw -append "root=/dev/sda"
Use ``-kernel`` to provide the Linux kernel image and ``-append`` to
give the kernel command line arguments. The ``-initrd`` option can be
@ -23,8 +23,8 @@ virtual serial port and the QEMU monitor to the console with the
.. parsed-literal::
|qemu_system| -kernel bzImage -hda rootdisk.img \
-append "root=/dev/hda console=ttyS0" -nographic
|qemu_system| -kernel bzImage -drive file=rootdisk.img,format=raw \
-append "root=/dev/sda console=ttyS0" -nographic
Use Ctrl-a c to switch between the serial console and the monitor (see
:ref:`GUI_keys`).

2
docs/system/target-mips.rst
View File

@ -112,5 +112,5 @@ https://mipsdistros.mips.com/LinuxDistro/nanomips/kernels/v4.15.18-432-gb2eb9a8b
Start system emulation of Malta board with nanoMIPS I7200 CPU::
qemu-system-mipsel -cpu I7200 -kernel <kernel_image_file> \
-M malta -serial stdio -m <memory_size> -hda <disk_image_file> \
-M malta -serial stdio -m <memory_size> -drive file=<disk_image_file>,format=raw \
-append "mem=256m@0x0 rw console=ttyS0 vga=cirrus vesa=0x111 root=/dev/sda"

2
hw/acpi/acpi-pci-hotplug-stub.c
View File

@ -34,7 +34,7 @@ void acpi_pcihp_reset(AcpiPciHpState *s)
{
}
bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus)
bool acpi_pcihp_is_hotpluggable_bus(AcpiPciHpState *s, BusState *bus)
{
return true;
}

13
hw/acpi/ich9.c
View File

@ -41,15 +41,6 @@
#include "hw/mem/pc-dimm.h"
#include "hw/mem/nvdimm.h"
//#define DEBUG
#ifdef DEBUG
#define ICH9_DEBUG(fmt, ...) \
do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
#else
#define ICH9_DEBUG(fmt, ...) do { } while (0)
#endif
static void ich9_pm_update_sci_fn(ACPIREGS *regs)
{
ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
@ -135,8 +126,6 @@ static const MemoryRegionOps ich9_smi_ops = {
void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base)
{
ICH9_DEBUG("to 0x%x\n", pm_io_base);
assert((pm_io_base & ICH9_PMIO_MASK) == 0);
pm->pm_io_base = pm_io_base;
@ -570,7 +559,7 @@ void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
bool ich9_pm_is_hotpluggable_bus(HotplugHandler *hotplug_dev, BusState *bus)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
return acpi_pcihp_is_hotpluggbale_bus(&lpc->pm.acpi_pci_hotplug, bus);
return acpi_pcihp_is_hotpluggable_bus(&lpc->pm.acpi_pci_hotplug, bus);
}
void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)

2
hw/acpi/pcihp.c
View File

@ -371,7 +371,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
}
bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus)
bool acpi_pcihp_is_hotpluggable_bus(AcpiPciHpState *s, BusState *bus)
{
Object *o = OBJECT(bus->parent);

2
hw/acpi/piix4.c
View File

@ -406,7 +406,7 @@ static bool piix4_is_hotpluggable_bus(HotplugHandler *hotplug_dev,
BusState *bus)
{
PIIX4PMState *s = PIIX4_PM(hotplug_dev);
return acpi_pcihp_is_hotpluggbale_bus(&s->acpi_pci_hotplug, bus);
return acpi_pcihp_is_hotpluggable_bus(&s->acpi_pci_hotplug, bus);
}
static void piix4_pm_machine_ready(Notifier *n, void *opaque)

8
hw/core/machine.c
View File

@ -41,7 +41,7 @@ GlobalProperty hw_compat_10_0[] = {};
const size_t hw_compat_10_0_len = G_N_ELEMENTS(hw_compat_10_0);
GlobalProperty hw_compat_9_2[] = {
{"arm-cpu", "backcompat-pauth-default-use-qarma5", "true"},
{ "arm-cpu", "backcompat-pauth-default-use-qarma5", "true"},
{ "virtio-balloon-pci", "vectors", "0" },
{ "virtio-balloon-pci-transitional", "vectors", "0" },
{ "virtio-balloon-pci-non-transitional", "vectors", "0" },
@ -58,12 +58,12 @@ GlobalProperty hw_compat_9_1[] = {
const size_t hw_compat_9_1_len = G_N_ELEMENTS(hw_compat_9_1);
GlobalProperty hw_compat_9_0[] = {
{"arm-cpu", "backcompat-cntfrq", "true" },
{ "arm-cpu", "backcompat-cntfrq", "true" },
{ "scsi-hd", "migrate-emulated-scsi-request", "false" },
{ "scsi-cd", "migrate-emulated-scsi-request", "false" },
{"vfio-pci", "skip-vsc-check", "false" },
{ "vfio-pci", "skip-vsc-check", "false" },
{ "virtio-pci", "x-pcie-pm-no-soft-reset", "off" },
{"sd-card", "spec_version", "2" },
{ "sd-card", "spec_version", "2" },
};
const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0);

2
hw/display/apple-gfx.m
View File

@ -69,7 +69,7 @@ static dispatch_queue_t get_background_queue(void)
mach_vm_address_t address;
uint64_t len;
/*
* All unique MemoryRegions for which a mapping has been created in in this
* All unique MemoryRegions for which a mapping has been created in this
* task, and on which we have thus called memory_region_ref(). There are
* usually very few regions of system RAM in total, so we expect this array
* to be very short. Therefore, no need for sorting or fancy search

1
hw/isa/lpc_ich9.c
View File

@ -182,7 +182,6 @@ static uint64_t ich9_cc_read(void *opaque, hwaddr addr,
}
/* IRQ routing */
/* */
static void ich9_lpc_rout(uint8_t pirq_rout, int *pic_irq, int *pic_dis)
{
*pic_irq = pirq_rout & ICH9_LPC_PIRQ_ROUT_MASK;

2
hw/net/e1000x_regs.h
View File

@ -900,7 +900,7 @@ struct e1000_context_desc {
uint16_t tucse; /* TCP checksum end */
} tcp_fields;
} upper_setup;
uint32_t cmd_and_length; /* */
uint32_t cmd_and_length;
union {
uint32_t data;
struct {

2
hw/pci-host/gpex-acpi.c
View File

@ -182,7 +182,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
/*
* Resources defined for PXBs are composed of the following parts:
* 1. The resources the pci-brige/pcie-root-port need.
* 1. The resources the pci-bridge/pcie-root-port need.
* 2. The resources the devices behind pxb need.
*/
crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set,

19
hw/pci/pci.c
View File

@ -54,13 +54,6 @@
#include "hw/xen/xen.h"
#include "hw/i386/kvm/xen_evtchn.h"
//#define DEBUG_PCI
#ifdef DEBUG_PCI
# define PCI_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
#else
# define PCI_DPRINTF(format, ...) do { } while (0)
#endif
bool pci_available = true;
static char *pcibus_get_dev_path(DeviceState *dev);
@ -2439,12 +2432,12 @@ static void pci_patch_ids(PCIDevice *pdev, uint8_t *ptr, uint32_t size)
/* Only a valid rom will be patched. */
rom_magic = pci_get_word(ptr);
if (rom_magic != 0xaa55) {
PCI_DPRINTF("Bad ROM magic %04x\n", rom_magic);
trace_pci_bad_rom_magic(rom_magic, 0xaa55);
return;
}
pcir_offset = pci_get_word(ptr + 0x18);
if (pcir_offset + 8 >= size || memcmp(ptr + pcir_offset, "PCIR", 4)) {
PCI_DPRINTF("Bad PCIR offset 0x%x or signature\n", pcir_offset);
trace_pci_bad_pcir_offset(pcir_offset);
return;
}
@ -2453,8 +2446,8 @@ static void pci_patch_ids(PCIDevice *pdev, uint8_t *ptr, uint32_t size)
rom_vendor_id = pci_get_word(ptr + pcir_offset + 4);
rom_device_id = pci_get_word(ptr + pcir_offset + 6);
PCI_DPRINTF("%s: ROM id %04x%04x / PCI id %04x%04x\n", pdev->romfile,
vendor_id, device_id, rom_vendor_id, rom_device_id);
trace_pci_rom_and_pci_ids(pdev->romfile, vendor_id, device_id,
rom_vendor_id, rom_device_id);
checksum = ptr[6];
@ -2462,7 +2455,7 @@ static void pci_patch_ids(PCIDevice *pdev, uint8_t *ptr, uint32_t size)
/* Patch vendor id and checksum (at offset 6 for etherboot roms). */
checksum += (uint8_t)rom_vendor_id + (uint8_t)(rom_vendor_id >> 8);
checksum -= (uint8_t)vendor_id + (uint8_t)(vendor_id >> 8);
PCI_DPRINTF("ROM checksum %02x / %02x\n", ptr[6], checksum);
trace_pci_rom_checksum_change(ptr[6], checksum);
ptr[6] = checksum;
pci_set_word(ptr + pcir_offset + 4, vendor_id);
}
@ -2471,7 +2464,7 @@ static void pci_patch_ids(PCIDevice *pdev, uint8_t *ptr, uint32_t size)
/* Patch device id and checksum (at offset 6 for etherboot roms). */
checksum += (uint8_t)rom_device_id + (uint8_t)(rom_device_id >> 8);
checksum -= (uint8_t)device_id + (uint8_t)(device_id >> 8);
PCI_DPRINTF("ROM checksum %02x / %02x\n", ptr[6], checksum);
trace_pci_rom_checksum_change(ptr[6], checksum);
ptr[6] = checksum;
pci_set_word(ptr + pcir_offset + 6, device_id);
}

4
hw/pci/trace-events
View File

@ -6,6 +6,10 @@ pci_pm_transition(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, u
pci_update_mappings_del(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64
pci_update_mappings_add(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64
pci_route_irq(int dev_irq, const char *dev_path, int parent_irq, const char *parent_path) "IRQ %d @%s -> IRQ %d @%s"
pci_bad_rom_magic(uint16_t bad_rom_magic, uint16_t good_rom_magic) "Bad ROM magic number: %04"PRIX16". Should be: %04"PRIX16
pci_bad_pcir_offset(uint16_t pcir_offset) "Bad PCIR offset 0x%"PRIx16" or signature"
pci_rom_and_pci_ids(char *romfile, uint16_t vendor_id, uint16_t device_id, uint16_t rom_vendor_id, uint16_t rom_device_id) "%s: ROM ID %04"PRIx16":%04"PRIx16" | PCI ID %04"PRIx16":%04"PRIx16
pci_rom_checksum_change(uint8_t old_checksum, uint8_t new_checksum) "ROM checksum changed from %02"PRIx8" to %02"PRIx8
# pci_host.c
pci_cfg_read(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, unsigned offs, unsigned val) "%s %02x:%02x.%x @0x%x -> 0x%x"

2
hw/xen/xen-hvm-common.c
View File

@ -711,7 +711,7 @@ static int xen_map_ioreq_server(XenIOState *state)
/*
* If we fail to map the shared page with xenforeignmemory_map_resource()
* or if we're using buffered ioreqs, we need xen_get_ioreq_server_info()
* to provide the the addresses to map the shared page and/or to get the
* to provide the addresses to map the shared page and/or to get the
* event-channel port for buffered ioreqs.
*/
if (state->shared_page == NULL || state->has_bufioreq) {

2
include/exec/cpu-common.h
View File

@ -182,7 +182,7 @@ void list_cpus(void);
* @host_pc: the host pc within the translation
* @data: output data
*
* Attempt to load the the unwind state for a host pc occurring in
* Attempt to load the unwind state for a host pc occurring in
* translated code. If @host_pc is not in translated code, the
* function returns false; otherwise @data is loaded.
* This is the same unwind info as given to restore_state_to_opc.

2
include/hw/acpi/pcihp.h
View File

@ -58,7 +58,7 @@ typedef struct AcpiPciHpState {
void acpi_pcihp_init(Object *owner, AcpiPciHpState *, PCIBus *root,
MemoryRegion *io, uint16_t io_base);
bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus);
bool acpi_pcihp_is_hotpluggable_bus(AcpiPciHpState *s, BusState *bus);
void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp);
void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,

2
include/hw/xen/interface/io/blkif.h
View File

@ -324,7 +324,7 @@
* access (even when it should be read-only). If the frontend hits the
* maximum number of allowed persistently mapped grants, it can fallback
* to non persistent mode. This will cause a performance degradation,
* since the the backend driver will still try to map those grants
* since the backend driver will still try to map those grants
* persistently. Since the persistent grants protocol is compatible with
* the previous protocol, a frontend driver can choose to work in
* persistent mode even when the backend doesn't support it.

2
linux-user/mmap.c
View File

@ -645,7 +645,7 @@ static abi_long mmap_h_eq_g(abi_ulong start, abi_ulong len,
*
* However, this case is rather common with executable images,
* so the workaround is important for even trivial tests, whereas
* the mmap of of a file being extended is less common.
* the mmap of a file being extended is less common.
*/
static abi_long mmap_h_lt_g(abi_ulong start, abi_ulong len, int host_prot,
int mmap_flags, int page_flags, int fd,

2
qapi/machine-target.json
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@ -350,7 +350,7 @@
# migration-safe in the future (since 4.1)
#
# @deprecated: If true, this CPU model is deprecated and may be
# removed in in some future version of QEMU according to the QEMU
# removed in some future version of QEMU according to the QEMU
# deprecation policy. (since 5.2)
#
# @unavailable-features is a list of QOM property names that represent

2
qapi/qom.json
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@ -871,7 +871,7 @@
# link characteristics read from PCIe Configuration space.
# To get the full path latency from CPU to CXL attached DRAM
# CXL device: Add the latency from CPU to Generic Port (from
# HMAT indexed via the the node ID in this SRAT structure) to
# HMAT indexed via the node ID in this SRAT structure) to
# that for CXL bus links, the latency across intermediate switches
# and from the EP port to the actual memory. Bandwidth is more
# complex as there may be interleaving across multiple devices

2
qom/object.c
View File

@ -485,7 +485,7 @@ bool object_apply_global_props(Object *obj, const GPtrArray *props,
* Slot 0: accelerator's global property defaults
* Slot 1: machine's global property defaults
* Slot 2: global properties from legacy command line option
* Each is a GPtrArray of of GlobalProperty.
* Each is a GPtrArray of GlobalProperty.
* Applied in order, later entries override earlier ones.
*/
static GPtrArray *object_compat_props[3];