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trivial patches for 2025-05-09
-----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEZKoqtTHVaQM2a/75gqpKJDselHgFAmgeawQACgkQgqpKJDse lHgRcg/+LmwJJvMViRD/OJFRqp60zBnPyuXFyJJQ3q7lBsE5Vr8xdZUkrGUrQ0p+ ef6KRnqesaYFH6lEZIJIYXLPalHDIJg6NCHnOphXYoexYQ61e8Y07lmTJlCXK+T8 rTf230ZC0Jzuy6BM5cmk7cMnNtVp8gPgK5SOK4u5OJSQTBMDb/XZZkLdnjj5ChGJ aX4qZ9fDLOWJoteXA4QWx6F8K1ONvooS5IMYB6AFJI2xMASq8nVETPXIuSComBDY 2+krw8hLu6PoPd9yWjlnsE8y4NvNWyRAc2CVm3SI30PEIchvDiQuVJpUD5Q3xZy5 2OLD9nv9PqezERbD2ZdSa08VlbEeoyrRinBtZJv7m9qkiU8B4TGDn7hx23MAu6Zx POF+P1Bc4kixL46pDMll5ETcRr6k184anTvpPWhOynJZBZusc4rX3UHSrVJMsfTx DPjToUwRw50prtHyuYWWyoxZ+i9BOHAgiT/zOor2tte3xT/mvc8my9m2+YgDHnqE u8wTnH3zYqexOwLctC3aslSbR1sqqrCsKOA8ZXQ33Ac6kV1q2T4Om4stmRbewjMG ROsNky2iiKbPsSJsmZHVuv0vy3sHRVWyyp8ClSP5S+gNysEVu/Oka3E0KQ/vg72y lDA3kNKS2t7ZSPXoLFaSWI6aOnSpKZgNW09wSVDh/AjKV+LbC6c= =EoxT -----END PGP SIGNATURE----- Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging trivial patches for 2025-05-09 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEZKoqtTHVaQM2a/75gqpKJDselHgFAmgeawQACgkQgqpKJDse # lHgRcg/+LmwJJvMViRD/OJFRqp60zBnPyuXFyJJQ3q7lBsE5Vr8xdZUkrGUrQ0p+ # ef6KRnqesaYFH6lEZIJIYXLPalHDIJg6NCHnOphXYoexYQ61e8Y07lmTJlCXK+T8 # rTf230ZC0Jzuy6BM5cmk7cMnNtVp8gPgK5SOK4u5OJSQTBMDb/XZZkLdnjj5ChGJ # aX4qZ9fDLOWJoteXA4QWx6F8K1ONvooS5IMYB6AFJI2xMASq8nVETPXIuSComBDY # 2+krw8hLu6PoPd9yWjlnsE8y4NvNWyRAc2CVm3SI30PEIchvDiQuVJpUD5Q3xZy5 # 2OLD9nv9PqezERbD2ZdSa08VlbEeoyrRinBtZJv7m9qkiU8B4TGDn7hx23MAu6Zx # POF+P1Bc4kixL46pDMll5ETcRr6k184anTvpPWhOynJZBZusc4rX3UHSrVJMsfTx # DPjToUwRw50prtHyuYWWyoxZ+i9BOHAgiT/zOor2tte3xT/mvc8my9m2+YgDHnqE # u8wTnH3zYqexOwLctC3aslSbR1sqqrCsKOA8ZXQ33Ac6kV1q2T4Om4stmRbewjMG # ROsNky2iiKbPsSJsmZHVuv0vy3sHRVWyyp8ClSP5S+gNysEVu/Oka3E0KQ/vg72y # lDA3kNKS2t7ZSPXoLFaSWI6aOnSpKZgNW09wSVDh/AjKV+LbC6c= # =EoxT # -----END PGP SIGNATURE----- # gpg: Signature made Fri 09 May 2025 16:52:20 EDT # gpg: using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478 # gpg: Good signature from "Michael Tokarev <mjt@debian.org>" [unknown] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [unknown] # gpg: aka "Michael Tokarev <mjt@tls.msk.ru>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199 28F1 61AD 3D98 ECDF 2C8E # Subkey fingerprint: 64AA 2AB5 31D5 6903 366B FEF9 82AA 4A24 3B1E 9478 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (21 commits) docs/devel/testing/functional: Fix typo docs: replace `-hda` with `-drive` & update `root=` kernel parameter qapi/machine-target.json: fix "in in" typo in comment hw/display/apple-gfx.m: fix "in in" typo in comment qapi/qom.json: fix "the the" typo in comment include/hw/xen/interface/io/blkif.h: fix "the the" typo in comment include/exec/cpu-common.h: fix "the the" typo in comment hw/xen/xen-hvm-common.c: fix "the the" typo in comment block.c: fix "the the" typo in comment linux-user/mmap.c: fix "of of" typo in comment hw/acpi/pcihp: Fix typo in function name hw/pci-host/gpex-acpi: Fix typo in comment hw/net/e1000: Remove stray empty comment in header qom/object: Fix typo in comment hw/core/machine: Fix indentation hw/i386/acpi-build: Fix typo in function name hw/acpi/ich9: Remove ICH9_DEBUG macro hw/i386/acpi-build: Update document reference hw/i386/acpi-build: Fix typo and grammar in comment hw/isa/ich9: Remove stray empty comment ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
commit
a28b0f857e
2
block.c
2
block.c
@ -3153,7 +3153,7 @@ bdrv_attach_child_common(BlockDriverState *child_bs,
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* stop new requests from coming in. This is fine, we don't care about the
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* stop new requests from coming in. This is fine, we don't care about the
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* old requests here, they are not for this child. If another place enters a
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* old requests here, they are not for this child. If another place enters a
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* drain section for the same parent, but wants it to be fully quiesced, it
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* drain section for the same parent, but wants it to be fully quiesced, it
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* will not run most of the the code in .drained_begin() again (which is not
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* will not run most of the code in .drained_begin() again (which is not
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* a problem, we already did this), but it will still poll until the parent
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* a problem, we already did this), but it will still poll until the parent
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* is fully quiesced, so it will not be negatively affected either.
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* is fully quiesced, so it will not be negatively affected either.
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*/
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*/
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@ -274,7 +274,7 @@ speed mode in the meson.build file, while the "quick" speed mode is
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fine for functional tests that can be run without downloading files.
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fine for functional tests that can be run without downloading files.
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``make check`` then only runs the quick functional tests along with
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``make check`` then only runs the quick functional tests along with
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the other quick tests from the other test suites. If you choose to
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the other quick tests from the other test suites. If you choose to
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run only run ``make check-functional``, the "thorough" tests will be
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run only ``make check-functional``, the "thorough" tests will be
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executed, too. And to run all functional tests along with the others,
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executed, too. And to run all functional tests along with the others,
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you can use something like::
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you can use something like::
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@ -20,7 +20,7 @@ connection, use the ``-gdb dev`` option instead of ``-s``. See
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.. parsed-literal::
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.. parsed-literal::
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|qemu_system| -s -S -kernel bzImage -hda rootdisk.img -append "root=/dev/hda"
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|qemu_system| -s -S -kernel bzImage -drive file=rootdisk.img,format=raw -append "root=/dev/sda"
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QEMU will launch but will silently wait for gdb to connect.
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QEMU will launch but will silently wait for gdb to connect.
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@ -11,7 +11,7 @@ The syntax is:
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.. parsed-literal::
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.. parsed-literal::
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|qemu_system| -kernel bzImage -hda rootdisk.img -append "root=/dev/hda"
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|qemu_system| -kernel bzImage -drive file=rootdisk.img,format=raw -append "root=/dev/sda"
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Use ``-kernel`` to provide the Linux kernel image and ``-append`` to
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Use ``-kernel`` to provide the Linux kernel image and ``-append`` to
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give the kernel command line arguments. The ``-initrd`` option can be
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give the kernel command line arguments. The ``-initrd`` option can be
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@ -23,8 +23,8 @@ virtual serial port and the QEMU monitor to the console with the
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.. parsed-literal::
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.. parsed-literal::
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|qemu_system| -kernel bzImage -hda rootdisk.img \
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|qemu_system| -kernel bzImage -drive file=rootdisk.img,format=raw \
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-append "root=/dev/hda console=ttyS0" -nographic
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-append "root=/dev/sda console=ttyS0" -nographic
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Use Ctrl-a c to switch between the serial console and the monitor (see
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Use Ctrl-a c to switch between the serial console and the monitor (see
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:ref:`GUI_keys`).
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:ref:`GUI_keys`).
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@ -112,5 +112,5 @@ https://mipsdistros.mips.com/LinuxDistro/nanomips/kernels/v4.15.18-432-gb2eb9a8b
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Start system emulation of Malta board with nanoMIPS I7200 CPU::
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Start system emulation of Malta board with nanoMIPS I7200 CPU::
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qemu-system-mipsel -cpu I7200 -kernel <kernel_image_file> \
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qemu-system-mipsel -cpu I7200 -kernel <kernel_image_file> \
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-M malta -serial stdio -m <memory_size> -hda <disk_image_file> \
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-M malta -serial stdio -m <memory_size> -drive file=<disk_image_file>,format=raw \
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-append "mem=256m@0x0 rw console=ttyS0 vga=cirrus vesa=0x111 root=/dev/sda"
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-append "mem=256m@0x0 rw console=ttyS0 vga=cirrus vesa=0x111 root=/dev/sda"
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@ -34,7 +34,7 @@ void acpi_pcihp_reset(AcpiPciHpState *s)
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{
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{
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}
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}
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bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus)
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bool acpi_pcihp_is_hotpluggable_bus(AcpiPciHpState *s, BusState *bus)
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{
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{
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return true;
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return true;
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}
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}
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@ -41,15 +41,6 @@
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#include "hw/mem/pc-dimm.h"
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#include "hw/mem/pc-dimm.h"
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#include "hw/mem/nvdimm.h"
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#include "hw/mem/nvdimm.h"
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//#define DEBUG
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#ifdef DEBUG
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#define ICH9_DEBUG(fmt, ...) \
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do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
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#else
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#define ICH9_DEBUG(fmt, ...) do { } while (0)
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#endif
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static void ich9_pm_update_sci_fn(ACPIREGS *regs)
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static void ich9_pm_update_sci_fn(ACPIREGS *regs)
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{
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{
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ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
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ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
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@ -135,8 +126,6 @@ static const MemoryRegionOps ich9_smi_ops = {
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void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base)
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void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base)
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{
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{
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ICH9_DEBUG("to 0x%x\n", pm_io_base);
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assert((pm_io_base & ICH9_PMIO_MASK) == 0);
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assert((pm_io_base & ICH9_PMIO_MASK) == 0);
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pm->pm_io_base = pm_io_base;
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pm->pm_io_base = pm_io_base;
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@ -570,7 +559,7 @@ void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
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bool ich9_pm_is_hotpluggable_bus(HotplugHandler *hotplug_dev, BusState *bus)
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bool ich9_pm_is_hotpluggable_bus(HotplugHandler *hotplug_dev, BusState *bus)
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{
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{
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ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
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ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
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return acpi_pcihp_is_hotpluggbale_bus(&lpc->pm.acpi_pci_hotplug, bus);
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return acpi_pcihp_is_hotpluggable_bus(&lpc->pm.acpi_pci_hotplug, bus);
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}
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}
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void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
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void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
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@ -371,7 +371,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
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acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
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acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
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}
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}
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bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus)
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bool acpi_pcihp_is_hotpluggable_bus(AcpiPciHpState *s, BusState *bus)
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{
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{
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Object *o = OBJECT(bus->parent);
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Object *o = OBJECT(bus->parent);
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@ -406,7 +406,7 @@ static bool piix4_is_hotpluggable_bus(HotplugHandler *hotplug_dev,
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BusState *bus)
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BusState *bus)
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{
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{
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PIIX4PMState *s = PIIX4_PM(hotplug_dev);
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PIIX4PMState *s = PIIX4_PM(hotplug_dev);
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return acpi_pcihp_is_hotpluggbale_bus(&s->acpi_pci_hotplug, bus);
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return acpi_pcihp_is_hotpluggable_bus(&s->acpi_pci_hotplug, bus);
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}
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}
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static void piix4_pm_machine_ready(Notifier *n, void *opaque)
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static void piix4_pm_machine_ready(Notifier *n, void *opaque)
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@ -41,7 +41,7 @@ GlobalProperty hw_compat_10_0[] = {};
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const size_t hw_compat_10_0_len = G_N_ELEMENTS(hw_compat_10_0);
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const size_t hw_compat_10_0_len = G_N_ELEMENTS(hw_compat_10_0);
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GlobalProperty hw_compat_9_2[] = {
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GlobalProperty hw_compat_9_2[] = {
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{"arm-cpu", "backcompat-pauth-default-use-qarma5", "true"},
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{ "arm-cpu", "backcompat-pauth-default-use-qarma5", "true"},
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{ "virtio-balloon-pci", "vectors", "0" },
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{ "virtio-balloon-pci", "vectors", "0" },
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{ "virtio-balloon-pci-transitional", "vectors", "0" },
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{ "virtio-balloon-pci-transitional", "vectors", "0" },
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{ "virtio-balloon-pci-non-transitional", "vectors", "0" },
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{ "virtio-balloon-pci-non-transitional", "vectors", "0" },
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@ -58,12 +58,12 @@ GlobalProperty hw_compat_9_1[] = {
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const size_t hw_compat_9_1_len = G_N_ELEMENTS(hw_compat_9_1);
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const size_t hw_compat_9_1_len = G_N_ELEMENTS(hw_compat_9_1);
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GlobalProperty hw_compat_9_0[] = {
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GlobalProperty hw_compat_9_0[] = {
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{"arm-cpu", "backcompat-cntfrq", "true" },
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{ "arm-cpu", "backcompat-cntfrq", "true" },
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{ "scsi-hd", "migrate-emulated-scsi-request", "false" },
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{ "scsi-hd", "migrate-emulated-scsi-request", "false" },
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{ "scsi-cd", "migrate-emulated-scsi-request", "false" },
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{ "scsi-cd", "migrate-emulated-scsi-request", "false" },
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{"vfio-pci", "skip-vsc-check", "false" },
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{ "vfio-pci", "skip-vsc-check", "false" },
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{ "virtio-pci", "x-pcie-pm-no-soft-reset", "off" },
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{ "virtio-pci", "x-pcie-pm-no-soft-reset", "off" },
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{"sd-card", "spec_version", "2" },
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{ "sd-card", "spec_version", "2" },
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};
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};
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const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0);
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const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0);
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@ -69,7 +69,7 @@ static dispatch_queue_t get_background_queue(void)
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mach_vm_address_t address;
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mach_vm_address_t address;
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uint64_t len;
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uint64_t len;
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/*
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/*
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* All unique MemoryRegions for which a mapping has been created in in this
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* All unique MemoryRegions for which a mapping has been created in this
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* task, and on which we have thus called memory_region_ref(). There are
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* task, and on which we have thus called memory_region_ref(). There are
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* usually very few regions of system RAM in total, so we expect this array
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* usually very few regions of system RAM in total, so we expect this array
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* to be very short. Therefore, no need for sorting or fancy search
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* to be very short. Therefore, no need for sorting or fancy search
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@ -182,7 +182,6 @@ static uint64_t ich9_cc_read(void *opaque, hwaddr addr,
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}
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}
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|
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/* IRQ routing */
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/* IRQ routing */
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/* */
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static void ich9_lpc_rout(uint8_t pirq_rout, int *pic_irq, int *pic_dis)
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static void ich9_lpc_rout(uint8_t pirq_rout, int *pic_irq, int *pic_dis)
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{
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{
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*pic_irq = pirq_rout & ICH9_LPC_PIRQ_ROUT_MASK;
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*pic_irq = pirq_rout & ICH9_LPC_PIRQ_ROUT_MASK;
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@ -900,7 +900,7 @@ struct e1000_context_desc {
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uint16_t tucse; /* TCP checksum end */
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uint16_t tucse; /* TCP checksum end */
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} tcp_fields;
|
} tcp_fields;
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} upper_setup;
|
} upper_setup;
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uint32_t cmd_and_length; /* */
|
uint32_t cmd_and_length;
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union {
|
union {
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uint32_t data;
|
uint32_t data;
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struct {
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struct {
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|
@ -182,7 +182,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
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|
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/*
|
/*
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* Resources defined for PXBs are composed of the following parts:
|
* Resources defined for PXBs are composed of the following parts:
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||||||
* 1. The resources the pci-brige/pcie-root-port need.
|
* 1. The resources the pci-bridge/pcie-root-port need.
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* 2. The resources the devices behind pxb need.
|
* 2. The resources the devices behind pxb need.
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*/
|
*/
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crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set,
|
crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set,
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||||||
|
19
hw/pci/pci.c
19
hw/pci/pci.c
@ -54,13 +54,6 @@
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#include "hw/xen/xen.h"
|
#include "hw/xen/xen.h"
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#include "hw/i386/kvm/xen_evtchn.h"
|
#include "hw/i386/kvm/xen_evtchn.h"
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||||||
|
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||||||
//#define DEBUG_PCI
|
|
||||||
#ifdef DEBUG_PCI
|
|
||||||
# define PCI_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
|
|
||||||
#else
|
|
||||||
# define PCI_DPRINTF(format, ...) do { } while (0)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
bool pci_available = true;
|
bool pci_available = true;
|
||||||
|
|
||||||
static char *pcibus_get_dev_path(DeviceState *dev);
|
static char *pcibus_get_dev_path(DeviceState *dev);
|
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@ -2439,12 +2432,12 @@ static void pci_patch_ids(PCIDevice *pdev, uint8_t *ptr, uint32_t size)
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|||||||
/* Only a valid rom will be patched. */
|
/* Only a valid rom will be patched. */
|
||||||
rom_magic = pci_get_word(ptr);
|
rom_magic = pci_get_word(ptr);
|
||||||
if (rom_magic != 0xaa55) {
|
if (rom_magic != 0xaa55) {
|
||||||
PCI_DPRINTF("Bad ROM magic %04x\n", rom_magic);
|
trace_pci_bad_rom_magic(rom_magic, 0xaa55);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
pcir_offset = pci_get_word(ptr + 0x18);
|
pcir_offset = pci_get_word(ptr + 0x18);
|
||||||
if (pcir_offset + 8 >= size || memcmp(ptr + pcir_offset, "PCIR", 4)) {
|
if (pcir_offset + 8 >= size || memcmp(ptr + pcir_offset, "PCIR", 4)) {
|
||||||
PCI_DPRINTF("Bad PCIR offset 0x%x or signature\n", pcir_offset);
|
trace_pci_bad_pcir_offset(pcir_offset);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2453,8 +2446,8 @@ static void pci_patch_ids(PCIDevice *pdev, uint8_t *ptr, uint32_t size)
|
|||||||
rom_vendor_id = pci_get_word(ptr + pcir_offset + 4);
|
rom_vendor_id = pci_get_word(ptr + pcir_offset + 4);
|
||||||
rom_device_id = pci_get_word(ptr + pcir_offset + 6);
|
rom_device_id = pci_get_word(ptr + pcir_offset + 6);
|
||||||
|
|
||||||
PCI_DPRINTF("%s: ROM id %04x%04x / PCI id %04x%04x\n", pdev->romfile,
|
trace_pci_rom_and_pci_ids(pdev->romfile, vendor_id, device_id,
|
||||||
vendor_id, device_id, rom_vendor_id, rom_device_id);
|
rom_vendor_id, rom_device_id);
|
||||||
|
|
||||||
checksum = ptr[6];
|
checksum = ptr[6];
|
||||||
|
|
||||||
@ -2462,7 +2455,7 @@ static void pci_patch_ids(PCIDevice *pdev, uint8_t *ptr, uint32_t size)
|
|||||||
/* Patch vendor id and checksum (at offset 6 for etherboot roms). */
|
/* Patch vendor id and checksum (at offset 6 for etherboot roms). */
|
||||||
checksum += (uint8_t)rom_vendor_id + (uint8_t)(rom_vendor_id >> 8);
|
checksum += (uint8_t)rom_vendor_id + (uint8_t)(rom_vendor_id >> 8);
|
||||||
checksum -= (uint8_t)vendor_id + (uint8_t)(vendor_id >> 8);
|
checksum -= (uint8_t)vendor_id + (uint8_t)(vendor_id >> 8);
|
||||||
PCI_DPRINTF("ROM checksum %02x / %02x\n", ptr[6], checksum);
|
trace_pci_rom_checksum_change(ptr[6], checksum);
|
||||||
ptr[6] = checksum;
|
ptr[6] = checksum;
|
||||||
pci_set_word(ptr + pcir_offset + 4, vendor_id);
|
pci_set_word(ptr + pcir_offset + 4, vendor_id);
|
||||||
}
|
}
|
||||||
@ -2471,7 +2464,7 @@ static void pci_patch_ids(PCIDevice *pdev, uint8_t *ptr, uint32_t size)
|
|||||||
/* Patch device id and checksum (at offset 6 for etherboot roms). */
|
/* Patch device id and checksum (at offset 6 for etherboot roms). */
|
||||||
checksum += (uint8_t)rom_device_id + (uint8_t)(rom_device_id >> 8);
|
checksum += (uint8_t)rom_device_id + (uint8_t)(rom_device_id >> 8);
|
||||||
checksum -= (uint8_t)device_id + (uint8_t)(device_id >> 8);
|
checksum -= (uint8_t)device_id + (uint8_t)(device_id >> 8);
|
||||||
PCI_DPRINTF("ROM checksum %02x / %02x\n", ptr[6], checksum);
|
trace_pci_rom_checksum_change(ptr[6], checksum);
|
||||||
ptr[6] = checksum;
|
ptr[6] = checksum;
|
||||||
pci_set_word(ptr + pcir_offset + 6, device_id);
|
pci_set_word(ptr + pcir_offset + 6, device_id);
|
||||||
}
|
}
|
||||||
|
@ -6,6 +6,10 @@ pci_pm_transition(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, u
|
|||||||
pci_update_mappings_del(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64
|
pci_update_mappings_del(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64
|
||||||
pci_update_mappings_add(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64
|
pci_update_mappings_add(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64
|
||||||
pci_route_irq(int dev_irq, const char *dev_path, int parent_irq, const char *parent_path) "IRQ %d @%s -> IRQ %d @%s"
|
pci_route_irq(int dev_irq, const char *dev_path, int parent_irq, const char *parent_path) "IRQ %d @%s -> IRQ %d @%s"
|
||||||
|
pci_bad_rom_magic(uint16_t bad_rom_magic, uint16_t good_rom_magic) "Bad ROM magic number: %04"PRIX16". Should be: %04"PRIX16
|
||||||
|
pci_bad_pcir_offset(uint16_t pcir_offset) "Bad PCIR offset 0x%"PRIx16" or signature"
|
||||||
|
pci_rom_and_pci_ids(char *romfile, uint16_t vendor_id, uint16_t device_id, uint16_t rom_vendor_id, uint16_t rom_device_id) "%s: ROM ID %04"PRIx16":%04"PRIx16" | PCI ID %04"PRIx16":%04"PRIx16
|
||||||
|
pci_rom_checksum_change(uint8_t old_checksum, uint8_t new_checksum) "ROM checksum changed from %02"PRIx8" to %02"PRIx8
|
||||||
|
|
||||||
# pci_host.c
|
# pci_host.c
|
||||||
pci_cfg_read(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, unsigned offs, unsigned val) "%s %02x:%02x.%x @0x%x -> 0x%x"
|
pci_cfg_read(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, unsigned offs, unsigned val) "%s %02x:%02x.%x @0x%x -> 0x%x"
|
||||||
|
@ -711,7 +711,7 @@ static int xen_map_ioreq_server(XenIOState *state)
|
|||||||
/*
|
/*
|
||||||
* If we fail to map the shared page with xenforeignmemory_map_resource()
|
* If we fail to map the shared page with xenforeignmemory_map_resource()
|
||||||
* or if we're using buffered ioreqs, we need xen_get_ioreq_server_info()
|
* or if we're using buffered ioreqs, we need xen_get_ioreq_server_info()
|
||||||
* to provide the the addresses to map the shared page and/or to get the
|
* to provide the addresses to map the shared page and/or to get the
|
||||||
* event-channel port for buffered ioreqs.
|
* event-channel port for buffered ioreqs.
|
||||||
*/
|
*/
|
||||||
if (state->shared_page == NULL || state->has_bufioreq) {
|
if (state->shared_page == NULL || state->has_bufioreq) {
|
||||||
|
@ -182,7 +182,7 @@ void list_cpus(void);
|
|||||||
* @host_pc: the host pc within the translation
|
* @host_pc: the host pc within the translation
|
||||||
* @data: output data
|
* @data: output data
|
||||||
*
|
*
|
||||||
* Attempt to load the the unwind state for a host pc occurring in
|
* Attempt to load the unwind state for a host pc occurring in
|
||||||
* translated code. If @host_pc is not in translated code, the
|
* translated code. If @host_pc is not in translated code, the
|
||||||
* function returns false; otherwise @data is loaded.
|
* function returns false; otherwise @data is loaded.
|
||||||
* This is the same unwind info as given to restore_state_to_opc.
|
* This is the same unwind info as given to restore_state_to_opc.
|
||||||
|
@ -58,7 +58,7 @@ typedef struct AcpiPciHpState {
|
|||||||
void acpi_pcihp_init(Object *owner, AcpiPciHpState *, PCIBus *root,
|
void acpi_pcihp_init(Object *owner, AcpiPciHpState *, PCIBus *root,
|
||||||
MemoryRegion *io, uint16_t io_base);
|
MemoryRegion *io, uint16_t io_base);
|
||||||
|
|
||||||
bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus);
|
bool acpi_pcihp_is_hotpluggable_bus(AcpiPciHpState *s, BusState *bus);
|
||||||
void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
|
void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
|
||||||
DeviceState *dev, Error **errp);
|
DeviceState *dev, Error **errp);
|
||||||
void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
|
void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
|
||||||
|
@ -324,7 +324,7 @@
|
|||||||
* access (even when it should be read-only). If the frontend hits the
|
* access (even when it should be read-only). If the frontend hits the
|
||||||
* maximum number of allowed persistently mapped grants, it can fallback
|
* maximum number of allowed persistently mapped grants, it can fallback
|
||||||
* to non persistent mode. This will cause a performance degradation,
|
* to non persistent mode. This will cause a performance degradation,
|
||||||
* since the the backend driver will still try to map those grants
|
* since the backend driver will still try to map those grants
|
||||||
* persistently. Since the persistent grants protocol is compatible with
|
* persistently. Since the persistent grants protocol is compatible with
|
||||||
* the previous protocol, a frontend driver can choose to work in
|
* the previous protocol, a frontend driver can choose to work in
|
||||||
* persistent mode even when the backend doesn't support it.
|
* persistent mode even when the backend doesn't support it.
|
||||||
|
@ -645,7 +645,7 @@ static abi_long mmap_h_eq_g(abi_ulong start, abi_ulong len,
|
|||||||
*
|
*
|
||||||
* However, this case is rather common with executable images,
|
* However, this case is rather common with executable images,
|
||||||
* so the workaround is important for even trivial tests, whereas
|
* so the workaround is important for even trivial tests, whereas
|
||||||
* the mmap of of a file being extended is less common.
|
* the mmap of a file being extended is less common.
|
||||||
*/
|
*/
|
||||||
static abi_long mmap_h_lt_g(abi_ulong start, abi_ulong len, int host_prot,
|
static abi_long mmap_h_lt_g(abi_ulong start, abi_ulong len, int host_prot,
|
||||||
int mmap_flags, int page_flags, int fd,
|
int mmap_flags, int page_flags, int fd,
|
||||||
|
@ -350,7 +350,7 @@
|
|||||||
# migration-safe in the future (since 4.1)
|
# migration-safe in the future (since 4.1)
|
||||||
#
|
#
|
||||||
# @deprecated: If true, this CPU model is deprecated and may be
|
# @deprecated: If true, this CPU model is deprecated and may be
|
||||||
# removed in in some future version of QEMU according to the QEMU
|
# removed in some future version of QEMU according to the QEMU
|
||||||
# deprecation policy. (since 5.2)
|
# deprecation policy. (since 5.2)
|
||||||
#
|
#
|
||||||
# @unavailable-features is a list of QOM property names that represent
|
# @unavailable-features is a list of QOM property names that represent
|
||||||
|
@ -871,7 +871,7 @@
|
|||||||
# link characteristics read from PCIe Configuration space.
|
# link characteristics read from PCIe Configuration space.
|
||||||
# To get the full path latency from CPU to CXL attached DRAM
|
# To get the full path latency from CPU to CXL attached DRAM
|
||||||
# CXL device: Add the latency from CPU to Generic Port (from
|
# CXL device: Add the latency from CPU to Generic Port (from
|
||||||
# HMAT indexed via the the node ID in this SRAT structure) to
|
# HMAT indexed via the node ID in this SRAT structure) to
|
||||||
# that for CXL bus links, the latency across intermediate switches
|
# that for CXL bus links, the latency across intermediate switches
|
||||||
# and from the EP port to the actual memory. Bandwidth is more
|
# and from the EP port to the actual memory. Bandwidth is more
|
||||||
# complex as there may be interleaving across multiple devices
|
# complex as there may be interleaving across multiple devices
|
||||||
|
@ -485,7 +485,7 @@ bool object_apply_global_props(Object *obj, const GPtrArray *props,
|
|||||||
* Slot 0: accelerator's global property defaults
|
* Slot 0: accelerator's global property defaults
|
||||||
* Slot 1: machine's global property defaults
|
* Slot 1: machine's global property defaults
|
||||||
* Slot 2: global properties from legacy command line option
|
* Slot 2: global properties from legacy command line option
|
||||||
* Each is a GPtrArray of of GlobalProperty.
|
* Each is a GPtrArray of GlobalProperty.
|
||||||
* Applied in order, later entries override earlier ones.
|
* Applied in order, later entries override earlier ones.
|
||||||
*/
|
*/
|
||||||
static GPtrArray *object_compat_props[3];
|
static GPtrArray *object_compat_props[3];
|
||||||
|
Loading…
Reference in New Issue
Block a user