Proxmox-Port/qemu
1
0
Fork 0
mirror of https://github.com/qemu/qemu.git synced 2025-08-09 01:50:43 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

gt64xxx: QOM'ify GT64120 PCI host bridge

Browse Source 
Introduce type constant. Introduce cast macro to drop dummy busdev field
used with FROM_SYSBUS() macro that would've broken SYS_BUS_DEVICE().
Avoid accessing DeviceState indirectly through PCIHostState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Andreas Färber 2012-08-20 19:08:01 +02:00 committed by Anthony Liguori
parent 0e655047c5
commit 8d43d7e591
1 changed files with 20 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
hw/gt64xxx.c
View File

@ -229,9 +229,14 @@
target_phys_addr_t regname ##_length; \ target_phys_addr_t regname ##_length; \
MemoryRegion regname ##_mem MemoryRegion regname ##_mem
#define TYPE_GT64120_PCI_HOST_BRIDGE "gt64120"
#define GT64120_PCI_HOST_BRIDGE(obj) \
OBJECT_CHECK(GT64120State, (obj), TYPE_GT64120_PCI_HOST_BRIDGE)
typedef struct GT64120State { typedef struct GT64120State {
SysBusDevice busdev;
PCIHostState pci; PCIHostState pci;
uint32_t regs[GT_REGS]; uint32_t regs[GT_REGS];
PCI_MAPPING_ENTRY(PCI0IO); PCI_MAPPING_ENTRY(PCI0IO);
PCI_MAPPING_ENTRY(ISD); PCI_MAPPING_ENTRY(ISD);
@ -1083,15 +1088,15 @@ static void gt64120_reset(void *opaque)
PCIBus *gt64120_register(qemu_irq *pic) PCIBus *gt64120_register(qemu_irq *pic)
{ {
SysBusDevice *s;
GT64120State *d; GT64120State *d;
PCIHostState *phb;
DeviceState *dev; DeviceState *dev;
dev = qdev_create(NULL, "gt64120"); dev = qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE);
qdev_init_nofail(dev); qdev_init_nofail(dev);
s = sysbus_from_qdev(dev); d = GT64120_PCI_HOST_BRIDGE(dev);
d = FROM_SYSBUS(GT64120State, s); phb = &d->pci;
d->pci.bus = pci_register_bus(&d->busdev.qdev, "pci", phb->bus = pci_register_bus(dev, "pci",
gt64120_pci_set_irq, gt64120_pci_map_irq, gt64120_pci_set_irq, gt64120_pci_map_irq,
pic, pic,
get_system_memory(), get_system_memory(),
@ -1099,15 +1104,15 @@ PCIBus *gt64120_register(qemu_irq *pic)
PCI_DEVFN(18, 0), 4); PCI_DEVFN(18, 0), 4);
memory_region_init_io(&d->ISD_mem, &isd_mem_ops, d, "isd-mem", 0x1000); memory_region_init_io(&d->ISD_mem, &isd_mem_ops, d, "isd-mem", 0x1000);
pci_create_simple(d->pci.bus, PCI_DEVFN(0, 0), "gt64120_pci"); pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci");
return d->pci.bus; return phb->bus;
} }
static int gt64120_init(SysBusDevice *dev) static int gt64120_init(SysBusDevice *dev)
{ {
GT64120State *s; GT64120State *s;
s = FROM_SYSBUS(GT64120State, dev); s = GT64120_PCI_HOST_BRIDGE(dev);
/* FIXME: This value is computed from registers during reset, but some /* FIXME: This value is computed from registers during reset, but some
devices (e.g. VGA card) need to know it when they are registered. devices (e.g. VGA card) need to know it when they are registered.
@ -1162,7 +1167,7 @@ static void gt64120_class_init(ObjectClass *klass, void *data)
} }
static const TypeInfo gt64120_info = { static const TypeInfo gt64120_info = {
.name = "gt64120", .name = TYPE_GT64120_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(GT64120State), .instance_size = sizeof(GT64120State),
.class_init = gt64120_class_init, .class_init = gt64120_class_init,