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target-cris/translate.c: Code style clean-up

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Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Evgeny Voevodin 2012-11-12 13:27:43 +04:00 committed by Blue Swirl
parent 9cb535fe4e
commit 7b5eff4daa
1 changed files with 2419 additions and 2379 deletions
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350
target-cris/translate.c
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@ -166,56 +166,65 @@ static int preg_sizes[] = {
static inline void t_gen_mov_TN_reg(TCGv tn, int r) static inline void t_gen_mov_TN_reg(TCGv tn, int r)
{ {
if (r < 0 || r > 15) if (r < 0 || r > 15) {
fprintf(stderr, "wrong register read $r%d\n", r); fprintf(stderr, "wrong register read $r%d\n", r);
}
tcg_gen_mov_tl(tn, cpu_R[r]); tcg_gen_mov_tl(tn, cpu_R[r]);
} }
static inline void t_gen_mov_reg_TN(int r, TCGv tn) static inline void t_gen_mov_reg_TN(int r, TCGv tn)
{ {
if (r < 0 || r > 15) if (r < 0 || r > 15) {
fprintf(stderr, "wrong register write $r%d\n", r); fprintf(stderr, "wrong register write $r%d\n", r);
}
tcg_gen_mov_tl(cpu_R[r], tn); tcg_gen_mov_tl(cpu_R[r], tn);
} }
static inline void _t_gen_mov_TN_env(TCGv tn, int offset) static inline void _t_gen_mov_TN_env(TCGv tn, int offset)
{ {
if (offset > sizeof (CPUCRISState)) if (offset > sizeof(CPUCRISState)) {
fprintf(stderr, "wrong load from env from off=%d\n", offset); fprintf(stderr, "wrong load from env from off=%d\n", offset);
}
tcg_gen_ld_tl(tn, cpu_env, offset); tcg_gen_ld_tl(tn, cpu_env, offset);
} }
static inline void _t_gen_mov_env_TN(int offset, TCGv tn) static inline void _t_gen_mov_env_TN(int offset, TCGv tn)
{ {
if (offset > sizeof (CPUCRISState)) if (offset > sizeof(CPUCRISState)) {
fprintf(stderr, "wrong store to env at off=%d\n", offset); fprintf(stderr, "wrong store to env at off=%d\n", offset);
}
tcg_gen_st_tl(tn, cpu_env, offset); tcg_gen_st_tl(tn, cpu_env, offset);
} }
static inline void t_gen_mov_TN_preg(TCGv tn, int r) static inline void t_gen_mov_TN_preg(TCGv tn, int r)
{ {
if (r < 0 || r > 15) if (r < 0 || r > 15) {
fprintf(stderr, "wrong register read $p%d\n", r); fprintf(stderr, "wrong register read $p%d\n", r);
if (r == PR_BZ || r == PR_WZ || r == PR_DZ) }
if (r == PR_BZ || r == PR_WZ || r == PR_DZ) {
tcg_gen_mov_tl(tn, tcg_const_tl(0)); tcg_gen_mov_tl(tn, tcg_const_tl(0));
else if (r == PR_VR) } else if (r == PR_VR) {
tcg_gen_mov_tl(tn, tcg_const_tl(32)); tcg_gen_mov_tl(tn, tcg_const_tl(32));
else } else {
tcg_gen_mov_tl(tn, cpu_PR[r]); tcg_gen_mov_tl(tn, cpu_PR[r]);
} }
}
static inline void t_gen_mov_preg_TN(DisasContext *dc, int r, TCGv tn) static inline void t_gen_mov_preg_TN(DisasContext *dc, int r, TCGv tn)
{ {
if (r < 0 || r > 15) if (r < 0 || r > 15) {
fprintf(stderr, "wrong register write $p%d\n", r); fprintf(stderr, "wrong register write $p%d\n", r);
if (r == PR_BZ || r == PR_WZ || r == PR_DZ) }
if (r == PR_BZ || r == PR_WZ || r == PR_DZ) {
return; return;
else if (r == PR_SRS) } else if (r == PR_SRS) {
tcg_gen_andi_tl(cpu_PR[r], tn, 3); tcg_gen_andi_tl(cpu_PR[r], tn, 3);
else { } else {
if (r == PR_PID) if (r == PR_PID) {
gen_helper_tlb_flush_pid(cpu_env, tn); gen_helper_tlb_flush_pid(cpu_env, tn);
if (dc->tb_flags & S_FLAG && r == PR_SPC) }
if (dc->tb_flags & S_FLAG && r == PR_SPC) {
gen_helper_spc_write(cpu_env, tn); gen_helper_spc_write(cpu_env, tn);
else if (r == PR_CCS) } else if (r == PR_CCS) {
dc->cpustate_changed = 1; dc->cpustate_changed = 1;
}
tcg_gen_mov_tl(cpu_PR[r], tn); tcg_gen_mov_tl(cpu_PR[r], tn);
} }
} }
@ -415,8 +424,9 @@ static inline void t_gen_add_flag(TCGv d, int flag)
t_gen_mov_TN_preg(c, PR_CCS); t_gen_mov_TN_preg(c, PR_CCS);
/* Propagate carry into d. */ /* Propagate carry into d. */
tcg_gen_andi_tl(c, c, 1 << flag); tcg_gen_andi_tl(c, c, 1 << flag);
if (flag) if (flag) {
tcg_gen_shri_tl(c, c, flag); tcg_gen_shri_tl(c, c, flag);
}
tcg_gen_add_tl(d, d, c); tcg_gen_add_tl(d, d, c);
tcg_temp_free(c); tcg_temp_free(c);
} }
@ -597,8 +607,9 @@ static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest)
static inline void cris_clear_x_flag(DisasContext *dc) static inline void cris_clear_x_flag(DisasContext *dc)
{ {
if (dc->flagx_known && dc->flags_x) if (dc->flagx_known && dc->flags_x) {
dc->flags_uptodate = 0; dc->flags_uptodate = 0;
}
dc->flagx_known = 1; dc->flagx_known = 1;
dc->flags_x = 0; dc->flags_x = 0;
@ -616,13 +627,13 @@ static void cris_flush_cc_state(DisasContext *dc)
static void cris_evaluate_flags(DisasContext *dc) static void cris_evaluate_flags(DisasContext *dc)
{ {
if (dc->flags_uptodate) if (dc->flags_uptodate) {
return; return;
}
cris_flush_cc_state(dc); cris_flush_cc_state(dc);
switch (dc->cc_op) switch (dc->cc_op) {
{
case CC_OP_MCP: case CC_OP_MCP:
gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], cpu_env, gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], cpu_env,
cpu_PR[PR_CCS], cc_src, cpu_PR[PR_CCS], cc_src,
@ -645,8 +656,7 @@ static void cris_evaluate_flags(DisasContext *dc)
case CC_OP_ASR: case CC_OP_ASR:
case CC_OP_LSR: case CC_OP_LSR:
case CC_OP_LSL: case CC_OP_LSL:
switch (dc->cc_size) switch (dc->cc_size) {
{
case 4: case 4:
gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS], gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS],
cpu_env, cpu_PR[PR_CCS], cc_result); cpu_env, cpu_PR[PR_CCS], cc_result);
@ -665,16 +675,16 @@ static void cris_evaluate_flags(DisasContext *dc)
break; break;
case CC_OP_SUB: case CC_OP_SUB:
case CC_OP_CMP: case CC_OP_CMP:
if (dc->cc_size == 4) if (dc->cc_size == 4) {
gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS], cpu_env, gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS], cpu_env,
cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); cpu_PR[PR_CCS], cc_src, cc_dest, cc_result);
else } else {
gen_helper_evaluate_flags(cpu_env); gen_helper_evaluate_flags(cpu_env);
}
break; break;
default: default:
switch (dc->cc_size) switch (dc->cc_size) {
{
case 4: case 4:
gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS], cpu_env, gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS], cpu_env,
cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); cpu_PR[PR_CCS], cc_src, cc_dest, cc_result);
@ -687,12 +697,11 @@ static void cris_evaluate_flags(DisasContext *dc)
} }
if (dc->flagx_known) { if (dc->flagx_known) {
if (dc->flags_x) if (dc->flags_x) {
tcg_gen_ori_tl(cpu_PR[PR_CCS], tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], X_FLAG);
cpu_PR[PR_CCS], X_FLAG); } else if (dc->cc_op == CC_OP_FLAGS) {
else if (dc->cc_op == CC_OP_FLAGS) tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~X_FLAG);
tcg_gen_andi_tl(cpu_PR[PR_CCS], }
cpu_PR[PR_CCS], ~X_FLAG);
} }
dc->flags_uptodate = 1; dc->flags_uptodate = 1;
} }
@ -728,12 +737,12 @@ static inline void cris_update_cc_x(DisasContext *dc)
{ {
/* Save the x flag state at the time of the cc snapshot. */ /* Save the x flag state at the time of the cc snapshot. */
if (dc->flagx_known) { if (dc->flagx_known) {
if (dc->cc_x_uptodate == (2 | dc->flags_x)) if (dc->cc_x_uptodate == (2 | dc->flags_x)) {
return; return;
}
tcg_gen_movi_tl(cc_x, dc->flags_x); tcg_gen_movi_tl(cc_x, dc->flags_x);
dc->cc_x_uptodate = 2 | dc->flags_x; dc->cc_x_uptodate = 2 | dc->flags_x;
} } else {
else {
tcg_gen_andi_tl(cc_x, cpu_PR[PR_CCS], X_FLAG); tcg_gen_andi_tl(cc_x, cpu_PR[PR_CCS], X_FLAG);
dc->cc_x_uptodate = 1; dc->cc_x_uptodate = 1;
} }
@ -753,8 +762,9 @@ static void cris_pre_alu_update_cc(DisasContext *dc, int op,
&& op != CC_OP_XOR && op != CC_OP_XOR
&& op != CC_OP_ASR && op != CC_OP_ASR
&& op != CC_OP_LSR && op != CC_OP_LSR
&& op != CC_OP_LSL) && op != CC_OP_LSL) {
tcg_gen_mov_tl(cc_dest, dst); tcg_gen_mov_tl(cc_dest, dst);
}
cris_update_cc_x(dc); cris_update_cc_x(dc);
} }
@ -763,17 +773,17 @@ static void cris_pre_alu_update_cc(DisasContext *dc, int op,
/* Update cc after executing ALU op. needs the result. */ /* Update cc after executing ALU op. needs the result. */
static inline void cris_update_result(DisasContext *dc, TCGv res) static inline void cris_update_result(DisasContext *dc, TCGv res)
{ {
if (dc->update_cc) if (dc->update_cc) {
tcg_gen_mov_tl(cc_result, res); tcg_gen_mov_tl(cc_result, res);
} }
}
/* Returns one if the write back stage should execute. */ /* Returns one if the write back stage should execute. */
static void cris_alu_op_exec(DisasContext *dc, int op, static void cris_alu_op_exec(DisasContext *dc, int op,
TCGv dst, TCGv a, TCGv b, int size) TCGv dst, TCGv a, TCGv b, int size)
{ {
/* Emit the ALU insns. */ /* Emit the ALU insns. */
switch (op) switch (op) {
{
case CC_OP_ADD: case CC_OP_ADD:
tcg_gen_add_tl(dst, a, b); tcg_gen_add_tl(dst, a, b);
/* Extended arithmetics. */ /* Extended arithmetics. */
@ -854,11 +864,12 @@ static void cris_alu_op_exec(DisasContext *dc, int op,
break; break;
} }
if (size == 1) if (size == 1) {
tcg_gen_andi_tl(dst, dst, 0xff); tcg_gen_andi_tl(dst, dst, 0xff);
else if (size == 2) } else if (size == 2) {
tcg_gen_andi_tl(dst, dst, 0xffff); tcg_gen_andi_tl(dst, dst, 0xffff);
} }
}
static void cris_alu(DisasContext *dc, int op, static void cris_alu(DisasContext *dc, int op,
TCGv d, TCGv op_a, TCGv op_b, int size) TCGv d, TCGv op_a, TCGv op_b, int size)
@ -874,8 +885,9 @@ static void cris_alu(DisasContext *dc, int op,
} else if (size == 4) { } else if (size == 4) {
tmp = d; tmp = d;
writeback = 0; writeback = 0;
} else } else {
tmp = tcg_temp_new(); tmp = tcg_temp_new();
}
cris_pre_alu_update_cc(dc, op, op_a, op_b, size); cris_pre_alu_update_cc(dc, op, op_a, op_b, size);
@ -884,15 +896,17 @@ static void cris_alu(DisasContext *dc, int op,
/* Writeback. */ /* Writeback. */
if (writeback) { if (writeback) {
if (size == 1) if (size == 1) {
tcg_gen_andi_tl(d, d, ~0xff); tcg_gen_andi_tl(d, d, ~0xff);
else } else {
tcg_gen_andi_tl(d, d, ~0xffff); tcg_gen_andi_tl(d, d, ~0xffff);
}
tcg_gen_or_tl(d, d, tmp); tcg_gen_or_tl(d, d, tmp);
} }
if (!TCGV_EQUAL(tmp, d)) if (!TCGV_EQUAL(tmp, d)) {
tcg_temp_free(tmp); tcg_temp_free(tmp);
} }
}
static int arith_cc(DisasContext *dc) static int arith_cc(DisasContext *dc)
{ {
@ -941,8 +955,7 @@ static void gen_tst_cc (DisasContext *dc, TCGv cc, int cond)
&& dc->cc_x_uptodate != (2 | X_FLAG)) { && dc->cc_x_uptodate != (2 | X_FLAG)) {
tcg_gen_setcond_tl(TCG_COND_EQ, cc, tcg_gen_setcond_tl(TCG_COND_EQ, cc,
cc_result, tcg_const_tl(0)); cc_result, tcg_const_tl(0));
} } else {
else {
cris_evaluate_flags(dc); cris_evaluate_flags(dc);
tcg_gen_andi_tl(cc, tcg_gen_andi_tl(cc,
cpu_PR[PR_CCS], Z_FLAG); cpu_PR[PR_CCS], Z_FLAG);
@ -982,10 +995,11 @@ static void gen_tst_cc (DisasContext *dc, TCGv cc, int cond)
if (arith_opt || move_opt) { if (arith_opt || move_opt) {
int bits = 31; int bits = 31;
if (dc->cc_size == 1) if (dc->cc_size == 1) {
bits = 7; bits = 7;
else if (dc->cc_size == 2) } else if (dc->cc_size == 2) {
bits = 15; bits = 15;
}
tcg_gen_shri_tl(cc, cc_result, bits); tcg_gen_shri_tl(cc, cc_result, bits);
tcg_gen_xori_tl(cc, cc, 1); tcg_gen_xori_tl(cc, cc, 1);
@ -1000,15 +1014,15 @@ static void gen_tst_cc (DisasContext *dc, TCGv cc, int cond)
if (arith_opt || move_opt) { if (arith_opt || move_opt) {
int bits = 31; int bits = 31;
if (dc->cc_size == 1) if (dc->cc_size == 1) {
bits = 7; bits = 7;
else if (dc->cc_size == 2) } else if (dc->cc_size == 2) {
bits = 15; bits = 15;
}
tcg_gen_shri_tl(cc, cc_result, bits); tcg_gen_shri_tl(cc, cc_result, bits);
tcg_gen_andi_tl(cc, cc, 1); tcg_gen_andi_tl(cc, cc, 1);
} } else {
else {
cris_evaluate_flags(dc); cris_evaluate_flags(dc);
tcg_gen_andi_tl(cc, cpu_PR[PR_CCS], tcg_gen_andi_tl(cc, cpu_PR[PR_CCS],
N_FLAG); N_FLAG);
@ -1155,8 +1169,9 @@ static void gen_load64(DisasContext *dc, TCGv_i64 dst, TCGv addr)
/* If we get a fault on a delayslot we must keep the jmp state in /* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */ the cpu-state to be able to re-execute the jmp. */
if (dc->delayed_branch == 1) if (dc->delayed_branch == 1) {
cris_store_direct_jmp(dc); cris_store_direct_jmp(dc);
}
tcg_gen_qemu_ld64(dst, addr, mem_index); tcg_gen_qemu_ld64(dst, addr, mem_index);
} }
@ -1168,25 +1183,25 @@ static void gen_load(DisasContext *dc, TCGv dst, TCGv addr,
/* If we get a fault on a delayslot we must keep the jmp state in /* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */ the cpu-state to be able to re-execute the jmp. */
if (dc->delayed_branch == 1) if (dc->delayed_branch == 1) {
cris_store_direct_jmp(dc); cris_store_direct_jmp(dc);
}
if (size == 1) { if (size == 1) {
if (sign) if (sign) {
tcg_gen_qemu_ld8s(dst, addr, mem_index); tcg_gen_qemu_ld8s(dst, addr, mem_index);
else } else {
tcg_gen_qemu_ld8u(dst, addr, mem_index); tcg_gen_qemu_ld8u(dst, addr, mem_index);
} }
else if (size == 2) { } else if (size == 2) {
if (sign) if (sign) {
tcg_gen_qemu_ld16s(dst, addr, mem_index); tcg_gen_qemu_ld16s(dst, addr, mem_index);
else } else {
tcg_gen_qemu_ld16u(dst, addr, mem_index); tcg_gen_qemu_ld16u(dst, addr, mem_index);
} }
else if (size == 4) { } else if (size == 4) {
tcg_gen_qemu_ld32u(dst, addr, mem_index); tcg_gen_qemu_ld32u(dst, addr, mem_index);
} } else {
else {
abort(); abort();
} }
} }
@ -1198,8 +1213,9 @@ static void gen_store (DisasContext *dc, TCGv addr, TCGv val,
/* If we get a fault on a delayslot we must keep the jmp state in /* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */ the cpu-state to be able to re-execute the jmp. */
if (dc->delayed_branch == 1) if (dc->delayed_branch == 1) {
cris_store_direct_jmp(dc); cris_store_direct_jmp(dc);
}
/* Conditional writes. We only support the kind were X and P are known /* Conditional writes. We only support the kind were X and P are known
@ -1211,12 +1227,13 @@ static void gen_store (DisasContext *dc, TCGv addr, TCGv val,
return; return;
} }
if (size == 1) if (size == 1) {
tcg_gen_qemu_st8(val, addr, mem_index); tcg_gen_qemu_st8(val, addr, mem_index);
else if (size == 2) } else if (size == 2) {
tcg_gen_qemu_st16(val, addr, mem_index); tcg_gen_qemu_st16(val, addr, mem_index);
else } else {
tcg_gen_qemu_st32(val, addr, mem_index); tcg_gen_qemu_st32(val, addr, mem_index);
}
if (dc->flagx_known && dc->flags_x) { if (dc->flagx_known && dc->flags_x) {
cris_evaluate_flags(dc); cris_evaluate_flags(dc);
@ -1226,29 +1243,30 @@ static void gen_store (DisasContext *dc, TCGv addr, TCGv val,
static inline void t_gen_sext(TCGv d, TCGv s, int size) static inline void t_gen_sext(TCGv d, TCGv s, int size)
{ {
if (size == 1) if (size == 1) {
tcg_gen_ext8s_i32(d, s); tcg_gen_ext8s_i32(d, s);
else if (size == 2) } else if (size == 2) {
tcg_gen_ext16s_i32(d, s); tcg_gen_ext16s_i32(d, s);
else if(!TCGV_EQUAL(d, s)) } else if (!TCGV_EQUAL(d, s)) {
tcg_gen_mov_tl(d, s); tcg_gen_mov_tl(d, s);
} }
}
static inline void t_gen_zext(TCGv d, TCGv s, int size) static inline void t_gen_zext(TCGv d, TCGv s, int size)
{ {
if (size == 1) if (size == 1) {
tcg_gen_ext8u_i32(d, s); tcg_gen_ext8u_i32(d, s);
else if (size == 2) } else if (size == 2) {
tcg_gen_ext16u_i32(d, s); tcg_gen_ext16u_i32(d, s);
else if (!TCGV_EQUAL(d, s)) } else if (!TCGV_EQUAL(d, s)) {
tcg_gen_mov_tl(d, s); tcg_gen_mov_tl(d, s);
} }
}
#if DISAS_CRIS #if DISAS_CRIS
static char memsize_char(int size) static char memsize_char(int size)
{ {
switch (size) switch (size) {
{
case 1: return 'b'; break; case 1: return 'b'; break;
case 2: return 'w'; break; case 2: return 'w'; break;
case 4: return 'd'; break; case 4: return 'd'; break;
@ -1266,8 +1284,7 @@ static inline unsigned int memsize_z(DisasContext *dc)
static inline unsigned int memsize_zz(DisasContext *dc) static inline unsigned int memsize_zz(DisasContext *dc)
{ {
switch (dc->zzsize) switch (dc->zzsize) {
{
case 0: return 1; case 0: return 1;
case 1: return 2; case 1: return 2;
default: default:
@ -1277,18 +1294,20 @@ static inline unsigned int memsize_zz(DisasContext *dc)
static inline void do_postinc (DisasContext *dc, int size) static inline void do_postinc (DisasContext *dc, int size)
{ {
if (dc->postinc) if (dc->postinc) {
tcg_gen_addi_tl(cpu_R[dc->op1], cpu_R[dc->op1], size); tcg_gen_addi_tl(cpu_R[dc->op1], cpu_R[dc->op1], size);
} }
}
static inline void dec_prep_move_r(DisasContext *dc, int rs, int rd, static inline void dec_prep_move_r(DisasContext *dc, int rs, int rd,
int size, int s_ext, TCGv dst) int size, int s_ext, TCGv dst)
{ {
if (s_ext) if (s_ext) {
t_gen_sext(dst, cpu_R[rs], size); t_gen_sext(dst, cpu_R[rs], size);
else } else {
t_gen_zext(dst, cpu_R[rs], size); t_gen_zext(dst, cpu_R[rs], size);
} }
}
/* Prepare T0 and T1 for a register alu operation. /* Prepare T0 and T1 for a register alu operation.
s_ext decides if the operand1 should be sign-extended or zero-extended when s_ext decides if the operand1 should be sign-extended or zero-extended when
@ -1298,11 +1317,12 @@ static void dec_prep_alu_r(DisasContext *dc, int rs, int rd,
{ {
dec_prep_move_r(dc, rs, rd, size, s_ext, src); dec_prep_move_r(dc, rs, rd, size, s_ext, src);
if (s_ext) if (s_ext) {
t_gen_sext(dst, cpu_R[rd], size); t_gen_sext(dst, cpu_R[rd], size);
else } else {
t_gen_zext(dst, cpu_R[rd], size); t_gen_zext(dst, cpu_R[rd], size);
} }
}
static int dec_prep_move_m(CPUCRISState *env, DisasContext *dc, static int dec_prep_move_m(CPUCRISState *env, DisasContext *dc,
int s_ext, int memsize, TCGv dst) int s_ext, int memsize, TCGv dst)
@ -1318,8 +1338,9 @@ static int dec_prep_move_m(CPUCRISState *env, DisasContext *dc,
/* Load [$rs] onto T1. */ /* Load [$rs] onto T1. */
if (is_imm) { if (is_imm) {
insn_len = 2 + memsize; insn_len = 2 + memsize;
if (memsize == 1) if (memsize == 1) {
insn_len++; insn_len++;
}
imm = cris_fetch(env, dc, dc->pc + 2, memsize, s_ext); imm = cris_fetch(env, dc, dc->pc + 2, memsize, s_ext);
tcg_gen_movi_tl(dst, imm); tcg_gen_movi_tl(dst, imm);
@ -1327,11 +1348,12 @@ static int dec_prep_move_m(CPUCRISState *env, DisasContext *dc,
} else { } else {
cris_flush_cc_state(dc); cris_flush_cc_state(dc);
gen_load(dc, dst, cpu_R[rs], memsize, 0); gen_load(dc, dst, cpu_R[rs], memsize, 0);
if (s_ext) if (s_ext) {
t_gen_sext(dst, dst, memsize); t_gen_sext(dst, dst, memsize);
else } else {
t_gen_zext(dst, dst, memsize); t_gen_zext(dst, dst, memsize);
} }
}
return insn_len; return insn_len;
} }
@ -1537,8 +1559,7 @@ static int dec_move_r(CPUCRISState *env, DisasContext *dc)
cris_update_cc_op(dc, CC_OP_MOVE, 4); cris_update_cc_op(dc, CC_OP_MOVE, 4);
cris_update_cc_x(dc); cris_update_cc_x(dc);
cris_update_result(dc, cpu_R[dc->op2]); cris_update_result(dc, cpu_R[dc->op2]);
} } else {
else {
TCGv t0; TCGv t0;
t0 = tcg_temp_new(); t0 = tcg_temp_new();
@ -1558,8 +1579,7 @@ static int dec_scc_r(CPUCRISState *env, DisasContext *dc)
LOG_DIS("s%s $r%u\n", LOG_DIS("s%s $r%u\n",
cc_name(cond), dc->op1); cc_name(cond), dc->op1);
if (cond != CC_A) if (cond != CC_A) {
{
int l1; int l1;
gen_tst_cc(dc, cpu_R[dc->op1], cond); gen_tst_cc(dc, cpu_R[dc->op1], cond);
@ -1567,9 +1587,9 @@ static int dec_scc_r(CPUCRISState *env, DisasContext *dc)
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_R[dc->op1], 0, l1); tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_R[dc->op1], 0, l1);
tcg_gen_movi_tl(cpu_R[dc->op1], 1); tcg_gen_movi_tl(cpu_R[dc->op1], 1);
gen_set_label(l1); gen_set_label(l1);
} } else {
else
tcg_gen_movi_tl(cpu_R[dc->op1], 1); tcg_gen_movi_tl(cpu_R[dc->op1], 1);
}
cris_cc_mask(dc, 0); cris_cc_mask(dc, 0);
return 2; return 2;
@ -1825,14 +1845,18 @@ static int dec_mcp_r(CPUCRISState *env, DisasContext *dc)
#if DISAS_CRIS #if DISAS_CRIS
static char * swapmode_name(int mode, char *modename) { static char * swapmode_name(int mode, char *modename) {
int i = 0; int i = 0;
if (mode & 8) if (mode & 8) {
modename[i++] = 'n'; modename[i++] = 'n';
if (mode & 4) }
if (mode & 4) {
modename[i++] = 'w'; modename[i++] = 'w';
if (mode & 2) }
if (mode & 2) {
modename[i++] = 'b'; modename[i++] = 'b';
if (mode & 1) }
if (mode & 1) {
modename[i++] = 'r'; modename[i++] = 'r';
}
modename[i++] = 0; modename[i++] = 0;
return modename; return modename;
} }
@ -1850,16 +1874,19 @@ static int dec_swap_r(CPUCRISState *env, DisasContext *dc)
cris_cc_mask(dc, CC_MASK_NZ); cris_cc_mask(dc, CC_MASK_NZ);
t0 = tcg_temp_new(); t0 = tcg_temp_new();
t_gen_mov_TN_reg(t0, dc->op1); t_gen_mov_TN_reg(t0, dc->op1);
if (dc->op2 & 8) if (dc->op2 & 8) {
tcg_gen_not_tl(t0, t0); tcg_gen_not_tl(t0, t0);
if (dc->op2 & 4) }
if (dc->op2 & 4) {
t_gen_swapw(t0, t0); t_gen_swapw(t0, t0);
if (dc->op2 & 2) }
if (dc->op2 & 2) {
t_gen_swapb(t0, t0); t_gen_swapb(t0, t0);
if (dc->op2 & 1) }
if (dc->op2 & 1) {
t_gen_swapr(t0, t0); t_gen_swapr(t0, t0);
cris_alu(dc, CC_OP_MOVE, }
cpu_R[dc->op1], cpu_R[dc->op1], t0, 4); cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op1], cpu_R[dc->op1], t0, 4);
tcg_temp_free(t0); tcg_temp_free(t0);
return 2; return 2;
} }
@ -1997,8 +2024,7 @@ static int dec_addu_r(CPUCRISState *env, DisasContext *dc)
t0 = tcg_temp_new(); t0 = tcg_temp_new();
/* Size can only be qi or hi. */ /* Size can only be qi or hi. */
t_gen_zext(t0, cpu_R[dc->op1], size); t_gen_zext(t0, cpu_R[dc->op1], size);
cris_alu(dc, CC_OP_ADD, cris_alu(dc, CC_OP_ADD, cpu_R[dc->op2], cpu_R[dc->op2], t0, 4);
cpu_R[dc->op2], cpu_R[dc->op2], t0, 4);
tcg_temp_free(t0); tcg_temp_free(t0);
return 2; return 2;
} }
@ -2073,11 +2099,8 @@ static int dec_setclrf(CPUCRISState *env, DisasContext *dc)
return 2; return 2;
} else if (!set && (flags & 0x20)) { } else if (!set && (flags & 0x20)) {
LOG_DIS("di\n"); LOG_DIS("di\n");
} } else {
else { LOG_DIS("%sf %x\n", set ? "set" : "clr", flags);
LOG_DIS("%sf %x\n",
set ? "set" : "clr",
flags);
} }
/* User space is not allowed to touch these. Silently ignore. */ /* User space is not allowed to touch these. Silently ignore. */
@ -2087,11 +2110,12 @@ static int dec_setclrf(CPUCRISState *env, DisasContext *dc)
if (flags & X_FLAG) { if (flags & X_FLAG) {
dc->flagx_known = 1; dc->flagx_known = 1;
if (set) if (set) {
dc->flags_x = X_FLAG; dc->flags_x = X_FLAG;
else } else {
dc->flags_x = 0; dc->flags_x = 0;
} }
}
/* Break the TB if any of the SPI flag changes. */ /* Break the TB if any of the SPI flag changes. */
if (flags & (P_FLAG | S_FLAG)) { if (flags & (P_FLAG | S_FLAG)) {
@ -2122,9 +2146,9 @@ static int dec_setclrf(CPUCRISState *env, DisasContext *dc)
dc->cpustate_changed = 1; dc->cpustate_changed = 1;
} }
tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], flags); tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], flags);
} } else {
else
tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~flags); tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~flags);
}
dc->flags_uptodate = 1; dc->flags_uptodate = 1;
dc->clear_x = 0; dc->clear_x = 0;
@ -2166,9 +2190,9 @@ static int dec_move_rp(CPUCRISState *env, DisasContext *dc)
tcg_gen_or_tl(t[0], t[1], t[0]); tcg_gen_or_tl(t[0], t[1], t[0]);
tcg_temp_free(t[1]); tcg_temp_free(t[1]);
} }
} } else {
else
t_gen_mov_TN_reg(t[0], dc->op1); t_gen_mov_TN_reg(t[0], dc->op1);
}
t_gen_mov_preg_TN(dc, dc->op2, t[0]); t_gen_mov_preg_TN(dc, dc->op2, t[0]);
if (dc->op2 == PR_CCS) { if (dc->op2 == PR_CCS) {
@ -2184,8 +2208,9 @@ static int dec_move_pr(CPUCRISState *env, DisasContext *dc)
LOG_DIS("move $p%u, $r%u\n", dc->op2, dc->op1); LOG_DIS("move $p%u, $r%u\n", dc->op2, dc->op1);
cris_cc_mask(dc, 0); cris_cc_mask(dc, 0);
if (dc->op2 == PR_CCS) if (dc->op2 == PR_CCS) {
cris_evaluate_flags(dc); cris_evaluate_flags(dc);
}
if (dc->op2 == PR_DZ) { if (dc->op2 == PR_DZ) {
tcg_gen_movi_tl(cpu_R[dc->op1], 0); tcg_gen_movi_tl(cpu_R[dc->op1], 0);
@ -2215,8 +2240,7 @@ static int dec_move_mr(CPUCRISState *env, DisasContext *dc)
cris_update_cc_op(dc, CC_OP_MOVE, 4); cris_update_cc_op(dc, CC_OP_MOVE, 4);
cris_update_cc_x(dc); cris_update_cc_x(dc);
cris_update_result(dc, cpu_R[dc->op2]); cris_update_result(dc, cpu_R[dc->op2]);
} } else {
else {
TCGv t0; TCGv t0;
t0 = tcg_temp_new(); t0 = tcg_temp_new();
@ -2634,8 +2658,9 @@ static int dec_move_pm(CPUCRISState *env, DisasContext *dc)
dc->op2, dc->op1, dc->postinc ? "+]" : "]"); dc->op2, dc->op1, dc->postinc ? "+]" : "]");
/* prepare store. Address in T0, value in T1. */ /* prepare store. Address in T0, value in T1. */
if (dc->op2 == PR_CCS) if (dc->op2 == PR_CCS) {
cris_evaluate_flags(dc); cris_evaluate_flags(dc);
}
t0 = tcg_temp_new(); t0 = tcg_temp_new();
t_gen_mov_TN_preg(t0, dc->op2); t_gen_mov_TN_preg(t0, dc->op2);
cris_flush_cc_state(dc); cris_flush_cc_state(dc);
@ -2643,8 +2668,9 @@ static int dec_move_pm(CPUCRISState *env, DisasContext *dc)
tcg_temp_free(t0); tcg_temp_free(t0);
cris_cc_mask(dc, 0); cris_cc_mask(dc, 0);
if (dc->postinc) if (dc->postinc) {
tcg_gen_addi_tl(cpu_R[dc->op1], cpu_R[dc->op1], memsize); tcg_gen_addi_tl(cpu_R[dc->op1], cpu_R[dc->op1], memsize);
}
return 2; return 2;
} }
@ -2671,8 +2697,9 @@ static int dec_movem_mr(CPUCRISState *env, DisasContext *dc)
tmp32 = tcg_temp_new_i32(); tmp32 = tcg_temp_new_i32();
tcg_gen_addi_tl(addr, cpu_R[dc->op1], i * 8); tcg_gen_addi_tl(addr, cpu_R[dc->op1], i * 8);
gen_load(dc, tmp32, addr, 4, 0); gen_load(dc, tmp32, addr, 4, 0);
} else } else {
TCGV_UNUSED(tmp32); TCGV_UNUSED(tmp32);
}
tcg_temp_free(addr); tcg_temp_free(addr);
for (i = 0; i < (nr >> 1); i++) { for (i = 0; i < (nr >> 1); i++) {
@ -2687,8 +2714,9 @@ static int dec_movem_mr(CPUCRISState *env, DisasContext *dc)
} }
/* writeback the updated pointer value. */ /* writeback the updated pointer value. */
if (dc->postinc) if (dc->postinc) {
tcg_gen_addi_tl(cpu_R[dc->op1], cpu_R[dc->op1], nr * 4); tcg_gen_addi_tl(cpu_R[dc->op1], cpu_R[dc->op1], nr * 4);
}
/* gen_load might want to evaluate the previous insns flags. */ /* gen_load might want to evaluate the previous insns flags. */
cris_cc_mask(dc, 0); cris_cc_mask(dc, 0);
@ -2716,8 +2744,9 @@ static int dec_movem_rm(CPUCRISState *env, DisasContext *dc)
gen_store(dc, addr, cpu_R[i], 4); gen_store(dc, addr, cpu_R[i], 4);
tcg_gen_add_tl(addr, addr, tmp); tcg_gen_add_tl(addr, addr, tmp);
} }
if (dc->postinc) if (dc->postinc) {
tcg_gen_mov_tl(cpu_R[dc->op1], addr); tcg_gen_mov_tl(cpu_R[dc->op1], addr);
}
cris_cc_mask(dc, 0); cris_cc_mask(dc, 0);
tcg_temp_free(tmp); tcg_temp_free(tmp);
tcg_temp_free(addr); tcg_temp_free(addr);
@ -2737,8 +2766,9 @@ static int dec_move_rm(CPUCRISState *env, DisasContext *dc)
cris_flush_cc_state(dc); cris_flush_cc_state(dc);
gen_store(dc, cpu_R[dc->op1], cpu_R[dc->op2], memsize); gen_store(dc, cpu_R[dc->op1], cpu_R[dc->op2], memsize);
if (dc->postinc) if (dc->postinc) {
tcg_gen_addi_tl(cpu_R[dc->op1], cpu_R[dc->op1], memsize); tcg_gen_addi_tl(cpu_R[dc->op1], cpu_R[dc->op1], memsize);
}
cris_cc_mask(dc, 0); cris_cc_mask(dc, 0);
return 2; return 2;
} }
@ -2775,8 +2805,9 @@ static int dec_jump_p(CPUCRISState *env, DisasContext *dc)
{ {
LOG_DIS("jump $p%u\n", dc->op2); LOG_DIS("jump $p%u\n", dc->op2);
if (dc->op2 == PR_CCS) if (dc->op2 == PR_CCS) {
cris_evaluate_flags(dc); cris_evaluate_flags(dc);
}
t_gen_mov_TN_preg(env_btarget, dc->op2); t_gen_mov_TN_preg(env_btarget, dc->op2);
/* rete will often have low bit set to indicate delayslot. */ /* rete will often have low bit set to indicate delayslot. */
tcg_gen_andi_tl(env_btarget, env_btarget, ~1); tcg_gen_andi_tl(env_btarget, env_btarget, ~1);
@ -2792,8 +2823,9 @@ static int dec_jas_r(CPUCRISState *env, DisasContext *dc)
cris_cc_mask(dc, 0); cris_cc_mask(dc, 0);
/* Store the return address in Pd. */ /* Store the return address in Pd. */
tcg_gen_mov_tl(env_btarget, cpu_R[dc->op1]); tcg_gen_mov_tl(env_btarget, cpu_R[dc->op1]);
if (dc->op2 > 15) if (dc->op2 > 15) {
abort(); abort();
}
t_gen_mov_preg_TN(dc, dc->op2, tcg_const_tl(dc->pc + 4)); t_gen_mov_preg_TN(dc, dc->op2, tcg_const_tl(dc->pc + 4));
cris_prepare_jmp(dc, JMP_INDIRECT); cris_prepare_jmp(dc, JMP_INDIRECT);
@ -2864,7 +2896,6 @@ static int dec_bas_im(CPUCRISState *env, DisasContext *dc)
{ {
int32_t simm; int32_t simm;
simm = cris_fetch(env, dc, dc->pc + 2, 4, 0); simm = cris_fetch(env, dc, dc->pc + 2, 4, 0);
LOG_DIS("bas 0x%x, $p%u\n", dc->pc + simm, dc->op2); LOG_DIS("bas 0x%x, $p%u\n", dc->pc + simm, dc->op2);
@ -3091,8 +3122,7 @@ static unsigned int crisv32_decoder(CPUCRISState *env, DisasContext *dc)
/* Large switch for all insns. */ /* Large switch for all insns. */
for (i = 0; i < ARRAY_SIZE(decinfo); i++) { for (i = 0; i < ARRAY_SIZE(decinfo); i++) {
if ((dc->opcode & decinfo[i].mask) == decinfo[i].bits) if ((dc->opcode & decinfo[i].mask) == decinfo[i].bits) {
{
insn_len = decinfo[i].dec(env, dc); insn_len = decinfo[i].dec(env, dc);
break; break;
} }
@ -3223,10 +3253,11 @@ gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb,
dc->tb_flags = tb->flags & (S_FLAG | P_FLAG | U_FLAG \ dc->tb_flags = tb->flags & (S_FLAG | P_FLAG | U_FLAG \
| X_FLAG | PFIX_FLAG); | X_FLAG | PFIX_FLAG);
dc->delayed_branch = !!(tb->flags & 7); dc->delayed_branch = !!(tb->flags & 7);
if (dc->delayed_branch) if (dc->delayed_branch) {
dc->jmp = JMP_INDIRECT; dc->jmp = JMP_INDIRECT;
else } else {
dc->jmp = JMP_NOJMP; dc->jmp = JMP_NOJMP;
}
dc->cpustate_changed = 0; dc->cpustate_changed = 0;
@ -3257,25 +3288,27 @@ gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb,
lj = -1; lj = -1;
num_insns = 0; num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK; max_insns = tb->cflags & CF_COUNT_MASK;
if (max_insns == 0) if (max_insns == 0) {
max_insns = CF_COUNT_MASK; max_insns = CF_COUNT_MASK;
}
gen_icount_start(); gen_icount_start();
do do {
{
check_breakpoint(env, dc); check_breakpoint(env, dc);
if (search_pc) { if (search_pc) {
j = gen_opc_ptr - gen_opc_buf; j = gen_opc_ptr - gen_opc_buf;
if (lj < j) { if (lj < j) {
lj++; lj++;
while (lj < j) while (lj < j) {
gen_opc_instr_start[lj++] = 0; gen_opc_instr_start[lj++] = 0;
} }
if (dc->delayed_branch == 1) }
if (dc->delayed_branch == 1) {
gen_opc_pc[lj] = dc->ppc | 1; gen_opc_pc[lj] = dc->ppc | 1;
else } else {
gen_opc_pc[lj] = dc->pc; gen_opc_pc[lj] = dc->pc;
}
gen_opc_instr_start[lj] = 1; gen_opc_instr_start[lj] = 1;
gen_opc_icount[lj] = num_insns; gen_opc_icount[lj] = num_insns;
} }
@ -3283,15 +3316,17 @@ gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb,
/* Pretty disas. */ /* Pretty disas. */
LOG_DIS("%8.8x:\t", dc->pc); LOG_DIS("%8.8x:\t", dc->pc);
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) {
gen_io_start(); gen_io_start();
}
dc->clear_x = 1; dc->clear_x = 1;
insn_len = dc->decoder(env, dc); insn_len = dc->decoder(env, dc);
dc->ppc = dc->pc; dc->ppc = dc->pc;
dc->pc += insn_len; dc->pc += insn_len;
if (dc->clear_x) if (dc->clear_x) {
cris_clear_x_flag(dc); cris_clear_x_flag(dc);
}
num_insns++; num_insns++;
/* Check for delayed branches here. If we do it before /* Check for delayed branches here. If we do it before
@ -3299,11 +3334,10 @@ gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb,
loop doing nothing for on this program location. */ loop doing nothing for on this program location. */
if (dc->delayed_branch) { if (dc->delayed_branch) {
dc->delayed_branch--; dc->delayed_branch--;
if (dc->delayed_branch == 0) if (dc->delayed_branch == 0) {
{ if (tb->flags & 7) {
if (tb->flags & 7) t_gen_mov_env_TN(dslot, tcg_const_tl(0));
t_gen_mov_env_TN(dslot, }
tcg_const_tl(0));
if (dc->cpustate_changed || !dc->flagx_known if (dc->cpustate_changed || !dc->flagx_known
|| (dc->flags_x != (tb->flags & X_FLAG))) { || (dc->flags_x != (tb->flags & X_FLAG))) {
cris_store_direct_jmp(dc); cris_store_direct_jmp(dc);
@ -3311,8 +3345,7 @@ gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb,
if (dc->clear_locked_irq) { if (dc->clear_locked_irq) {
dc->clear_locked_irq = 0; dc->clear_locked_irq = 0;
t_gen_mov_env_TN(locked_irq, t_gen_mov_env_TN(locked_irq, tcg_const_tl(0));
tcg_const_tl(0));
} }
if (dc->jmp == JMP_DIRECT_CC) { if (dc->jmp == JMP_DIRECT_CC) {
@ -3335,8 +3368,7 @@ gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb,
dc->is_jmp = DISAS_TB_JUMP; dc->is_jmp = DISAS_TB_JUMP;
dc->jmp = JMP_NOJMP; dc->jmp = JMP_NOJMP;
} else { } else {
t_gen_cc_jmp(env_btarget, t_gen_cc_jmp(env_btarget, tcg_const_tl(dc->pc));
tcg_const_tl(dc->pc));
dc->is_jmp = DISAS_JUMP; dc->is_jmp = DISAS_JUMP;
} }
break; break;
@ -3345,16 +3377,18 @@ gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb,
/* If we are rexecuting a branch due to exceptions on /* If we are rexecuting a branch due to exceptions on
delay slots dont break. */ delay slots dont break. */
if (!(tb->pc & 1) && env->singlestep_enabled) if (!(tb->pc & 1) && env->singlestep_enabled) {
break; break;
}
} while (!dc->is_jmp && !dc->cpustate_changed } while (!dc->is_jmp && !dc->cpustate_changed
&& gen_opc_ptr < gen_opc_end && gen_opc_ptr < gen_opc_end
&& !singlestep && !singlestep
&& (dc->pc < next_page_start) && (dc->pc < next_page_start)
&& num_insns < max_insns); && num_insns < max_insns);
if (dc->clear_locked_irq) if (dc->clear_locked_irq) {
t_gen_mov_env_TN(locked_irq, tcg_const_tl(0)); t_gen_mov_env_TN(locked_irq, tcg_const_tl(0));
}
npc = dc->pc; npc = dc->pc;
@ -3377,8 +3411,9 @@ gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb,
cris_evaluate_flags(dc); cris_evaluate_flags(dc);
if (unlikely(env->singlestep_enabled)) { if (unlikely(env->singlestep_enabled)) {
if (dc->is_jmp == DISAS_NEXT) if (dc->is_jmp == DISAS_NEXT) {
tcg_gen_movi_tl(env_pc, npc); tcg_gen_movi_tl(env_pc, npc);
}
t_gen_raise_exception(EXCP_DEBUG); t_gen_raise_exception(EXCP_DEBUG);
} else { } else {
switch (dc->is_jmp) { switch (dc->is_jmp) {
@ -3403,8 +3438,9 @@ gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb,
if (search_pc) { if (search_pc) {
j = gen_opc_ptr - gen_opc_buf; j = gen_opc_ptr - gen_opc_buf;
lj++; lj++;
while (lj <= j) while (lj <= j) {
gen_opc_instr_start[lj++] = 0; gen_opc_instr_start[lj++] = 0;
}
} else { } else {
tb->size = dc->pc - pc_start; tb->size = dc->pc - pc_start;
tb->icount = num_insns; tb->icount = num_insns;
@ -3438,8 +3474,9 @@ void cpu_dump_state (CPUCRISState *env, FILE *f, fprintf_function cpu_fprintf,
int i; int i;
uint32_t srs; uint32_t srs;
if (!env || !f) if (!env || !f) {
return; return;
}
cpu_fprintf(f, "PC=%x CCS=%x btaken=%d btarget=%x\n" cpu_fprintf(f, "PC=%x CCS=%x btaken=%d btarget=%x\n"
"cc_op=%d cc_src=%d cc_dest=%d cc_result=%x cc_mask=%x\n", "cc_op=%d cc_src=%d cc_dest=%d cc_result=%x cc_mask=%x\n",
@ -3450,25 +3487,28 @@ void cpu_dump_state (CPUCRISState *env, FILE *f, fprintf_function cpu_fprintf,
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
cpu_fprintf(f, "%s=%8.8x ", regnames[i], env->regs[i]); cpu_fprintf(f, "%s=%8.8x ", regnames[i], env->regs[i]);
if ((i + 1) % 4 == 0) if ((i + 1) % 4 == 0) {
cpu_fprintf(f, "\n"); cpu_fprintf(f, "\n");
} }
}
cpu_fprintf(f, "\nspecial regs:\n"); cpu_fprintf(f, "\nspecial regs:\n");
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
cpu_fprintf(f, "%s=%8.8x ", pregnames[i], env->pregs[i]); cpu_fprintf(f, "%s=%8.8x ", pregnames[i], env->pregs[i]);
if ((i + 1) % 4 == 0) if ((i + 1) % 4 == 0) {
cpu_fprintf(f, "\n"); cpu_fprintf(f, "\n");
} }
}
srs = env->pregs[PR_SRS]; srs = env->pregs[PR_SRS];
cpu_fprintf(f, "\nsupport function regs bank %x:\n", srs); cpu_fprintf(f, "\nsupport function regs bank %x:\n", srs);
if (srs < ARRAY_SIZE(env->sregs)) { if (srs < ARRAY_SIZE(env->sregs)) {
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
cpu_fprintf(f, "s%2.2d=%8.8x ", cpu_fprintf(f, "s%2.2d=%8.8x ",
i, env->sregs[srs][i]); i, env->sregs[srs][i]);
if ((i + 1) % 4 == 0) if ((i + 1) % 4 == 0) {
cpu_fprintf(f, "\n"); cpu_fprintf(f, "\n");
} }
} }
}
cpu_fprintf(f, "\n\n"); cpu_fprintf(f, "\n\n");
} }