mirror of
				https://github.com/qemu/qemu.git
				synced 2025-10-31 12:07:31 +00:00 
			
		
		
		
	target/ppc: Use tcg_constant_i32() in gen_setb()
Avoid using TCG temporaries for the -1 and 8 constant values. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211003141711.3673181-2-f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
		
							parent
							
								
									621f70d210
								
							
						
					
					
						commit
						6f4912a416
					
				| @ -5068,19 +5068,15 @@ static void gen_mtspr(DisasContext *ctx) | ||||
| static void gen_setb(DisasContext *ctx) | ||||
| { | ||||
|     TCGv_i32 t0 = tcg_temp_new_i32(); | ||||
|     TCGv_i32 t8 = tcg_temp_new_i32(); | ||||
|     TCGv_i32 tm1 = tcg_temp_new_i32(); | ||||
|     TCGv_i32 t8 = tcg_constant_i32(8); | ||||
|     TCGv_i32 tm1 = tcg_constant_i32(-1); | ||||
|     int crf = crfS(ctx->opcode); | ||||
| 
 | ||||
|     tcg_gen_setcondi_i32(TCG_COND_GEU, t0, cpu_crf[crf], 4); | ||||
|     tcg_gen_movi_i32(t8, 8); | ||||
|     tcg_gen_movi_i32(tm1, -1); | ||||
|     tcg_gen_movcond_i32(TCG_COND_GEU, t0, cpu_crf[crf], t8, tm1, t0); | ||||
|     tcg_gen_ext_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); | ||||
| 
 | ||||
|     tcg_temp_free_i32(t0); | ||||
|     tcg_temp_free_i32(t8); | ||||
|     tcg_temp_free_i32(tm1); | ||||
| } | ||||
| #endif | ||||
| 
 | ||||
|  | ||||
		Loading…
	
		Reference in New Issue
	
	Block a user
	 Philippe Mathieu-Daudé
						Philippe Mathieu-Daudé