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hw/sparc64: Fix code style for checkpatch.pl

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We are going to move this code, fix its style first.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210428141655.387430-4-f4bug@amsat.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This commit is contained in:
Philippe Mathieu-Daudé 2021-04-28 16:16:53 +02:00 committed by Mark Cave-Ayland
parent ef19ddfbf4
commit 5aa7f68a2d
1 changed files with 8 additions and 4 deletions
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12
hw/sparc64/sparc64.c
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@ -48,14 +48,18 @@ void cpu_check_irqs(CPUSPARCState *env)
return; return;
} }
cs = env_cpu(env); cs = env_cpu(env);
/* check if TM or SM in SOFTINT are set /*
setting these also causes interrupt 14 */ * check if TM or SM in SOFTINT are set
* setting these also causes interrupt 14
*/
if (env->softint & (SOFTINT_TIMER | SOFTINT_STIMER)) { if (env->softint & (SOFTINT_TIMER | SOFTINT_STIMER)) {
pil |= 1 << 14; pil |= 1 << 14;
} }
/* The bit corresponding to psrpil is (1<< psrpil), the next bit /*
is (2 << psrpil). */ * The bit corresponding to psrpil is (1<< psrpil),
* the next bit is (2 << psrpil).
*/
if (pil < (2 << env->psrpil)) { if (pil < (2 << env->psrpil)) {
if (cs->interrupt_request & CPU_INTERRUPT_HARD) { if (cs->interrupt_request & CPU_INTERRUPT_HARD) {
trace_sparc64_cpu_check_irqs_reset_irq(env->interrupt_index); trace_sparc64_cpu_check_irqs_reset_irq(env->interrupt_index);