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ppc/pnv: remove useless "core-pir" property alias.
Commit 158e17a65e
("ppc/pnv: Link "chip" property to PnvCore::chip
pointer") introduced some cleanups of the PnvCore realize handler.
Let's continue by reworking a bit the interface of the PnvCore
handlers for the CPU threads. These changes make the "core-pir"
property alias unused. Remove it.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20200127144154.10170-3-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
parent
a9ec49af3b
commit
59942f0ebb
@ -40,11 +40,11 @@ static const char *pnv_core_cpu_typename(PnvCore *pc)
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return cpu_type;
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return cpu_type;
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}
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}
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static void pnv_core_cpu_reset(PowerPCCPU *cpu, PnvChip *chip)
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static void pnv_core_cpu_reset(PnvCore *pc, PowerPCCPU *cpu)
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{
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{
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CPUState *cs = CPU(cpu);
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CPUState *cs = CPU(cpu);
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CPUPPCState *env = &cpu->env;
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CPUPPCState *env = &cpu->env;
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PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
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PnvChipClass *pcc = PNV_CHIP_GET_CLASS(pc->chip);
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cpu_reset(cs);
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cpu_reset(cs);
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@ -56,7 +56,7 @@ static void pnv_core_cpu_reset(PowerPCCPU *cpu, PnvChip *chip)
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env->nip = 0x10;
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env->nip = 0x10;
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env->msr |= MSR_HVB; /* Hypervisor mode */
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env->msr |= MSR_HVB; /* Hypervisor mode */
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pcc->intc_reset(chip, cpu);
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pcc->intc_reset(pc->chip, cpu);
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}
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}
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/*
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/*
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@ -162,14 +162,14 @@ static const MemoryRegionOps pnv_core_power9_xscom_ops = {
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.endianness = DEVICE_BIG_ENDIAN,
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.endianness = DEVICE_BIG_ENDIAN,
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};
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};
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static void pnv_core_cpu_realize(PowerPCCPU *cpu, PnvChip *chip, Error **errp)
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static void pnv_core_cpu_realize(PnvCore *pc, PowerPCCPU *cpu, Error **errp)
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{
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{
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CPUPPCState *env = &cpu->env;
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CPUPPCState *env = &cpu->env;
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int core_pir;
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int core_pir;
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int thread_index = 0; /* TODO: TCG supports only one thread */
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int thread_index = 0; /* TODO: TCG supports only one thread */
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ppc_spr_t *pir = &env->spr_cb[SPR_PIR];
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ppc_spr_t *pir = &env->spr_cb[SPR_PIR];
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Error *local_err = NULL;
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Error *local_err = NULL;
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PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
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PnvChipClass *pcc = PNV_CHIP_GET_CLASS(pc->chip);
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object_property_set_bool(OBJECT(cpu), true, "realized", &local_err);
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object_property_set_bool(OBJECT(cpu), true, "realized", &local_err);
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if (local_err) {
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if (local_err) {
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@ -177,13 +177,13 @@ static void pnv_core_cpu_realize(PowerPCCPU *cpu, PnvChip *chip, Error **errp)
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return;
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return;
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}
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}
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pcc->intc_create(chip, cpu, &local_err);
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pcc->intc_create(pc->chip, cpu, &local_err);
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if (local_err) {
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if (local_err) {
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error_propagate(errp, local_err);
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error_propagate(errp, local_err);
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return;
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return;
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}
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}
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core_pir = object_property_get_uint(OBJECT(cpu), "core-pir", &error_abort);
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core_pir = object_property_get_uint(OBJECT(pc), "pir", &error_abort);
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/*
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/*
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* The PIR of a thread is the core PIR + the thread index. We will
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* The PIR of a thread is the core PIR + the thread index. We will
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@ -203,7 +203,7 @@ static void pnv_core_reset(void *dev)
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int i;
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int i;
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for (i = 0; i < cc->nr_threads; i++) {
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for (i = 0; i < cc->nr_threads; i++) {
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pnv_core_cpu_reset(pc->threads[i], pc->chip);
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pnv_core_cpu_reset(pc, pc->threads[i]);
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}
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}
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}
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}
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@ -231,8 +231,6 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
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snprintf(name, sizeof(name), "thread[%d]", i);
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snprintf(name, sizeof(name), "thread[%d]", i);
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object_property_add_child(OBJECT(pc), name, obj, &error_abort);
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object_property_add_child(OBJECT(pc), name, obj, &error_abort);
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object_property_add_alias(obj, "core-pir", OBJECT(pc),
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"pir", &error_abort);
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cpu->machine_data = g_new0(PnvCPUState, 1);
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cpu->machine_data = g_new0(PnvCPUState, 1);
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@ -240,7 +238,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
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}
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}
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for (j = 0; j < cc->nr_threads; j++) {
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for (j = 0; j < cc->nr_threads; j++) {
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pnv_core_cpu_realize(pc->threads[j], pc->chip, &local_err);
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pnv_core_cpu_realize(pc, pc->threads[j], &local_err);
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if (local_err) {
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if (local_err) {
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goto err;
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goto err;
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}
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}
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@ -263,12 +261,12 @@ err:
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error_propagate(errp, local_err);
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error_propagate(errp, local_err);
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}
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}
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static void pnv_core_cpu_unrealize(PowerPCCPU *cpu, PnvChip *chip)
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static void pnv_core_cpu_unrealize(PnvCore *pc, PowerPCCPU *cpu)
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{
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{
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PnvCPUState *pnv_cpu = pnv_cpu_state(cpu);
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PnvCPUState *pnv_cpu = pnv_cpu_state(cpu);
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PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
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PnvChipClass *pcc = PNV_CHIP_GET_CLASS(pc->chip);
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pcc->intc_destroy(chip, cpu);
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pcc->intc_destroy(pc->chip, cpu);
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cpu_remove_sync(CPU(cpu));
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cpu_remove_sync(CPU(cpu));
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cpu->machine_data = NULL;
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cpu->machine_data = NULL;
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g_free(pnv_cpu);
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g_free(pnv_cpu);
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@ -284,7 +282,7 @@ static void pnv_core_unrealize(DeviceState *dev, Error **errp)
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qemu_unregister_reset(pnv_core_reset, pc);
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qemu_unregister_reset(pnv_core_reset, pc);
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for (i = 0; i < cc->nr_threads; i++) {
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for (i = 0; i < cc->nr_threads; i++) {
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pnv_core_cpu_unrealize(pc->threads[i], pc->chip);
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pnv_core_cpu_unrealize(pc, pc->threads[i]);
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}
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}
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g_free(pc->threads);
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g_free(pc->threads);
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}
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}
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