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target-arm: Fix Neon vsra instructions.

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This patch fixes the errors reported by my tests in VSRA.

Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Christophe Lyon 2011-01-25 18:18:08 +01:00 committed by Aurelien Jarno
parent 7026259f79
commit 5371cb8140
1 changed files with 2 additions and 2 deletions
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4
target-arm/translate.c
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@ -4686,7 +4686,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
} }
if (op == 1 || op == 3) { if (op == 1 || op == 3) {
/* Accumulate. */ /* Accumulate. */
neon_load_reg64(cpu_V0, rd + pass); neon_load_reg64(cpu_V1, rd + pass);
tcg_gen_add_i64(cpu_V0, cpu_V0, cpu_V1); tcg_gen_add_i64(cpu_V0, cpu_V0, cpu_V1);
} else if (op == 4 || (op == 5 && u)) { } else if (op == 4 || (op == 5 && u)) {
/* Insert */ /* Insert */
@ -4750,7 +4750,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
if (op == 1 || op == 3) { if (op == 1 || op == 3) {
/* Accumulate. */ /* Accumulate. */
tmp2 = neon_load_reg(rd, pass); tmp2 = neon_load_reg(rd, pass);
gen_neon_add(size, tmp2, tmp); gen_neon_add(size, tmp, tmp2);
dead_tmp(tmp2); dead_tmp(tmp2);
} else if (op == 4 || (op == 5 && u)) { } else if (op == 4 || (op == 5 && u)) {
/* Insert */ /* Insert */