mirror of
https://github.com/qemu/qemu.git
synced 2025-08-10 12:46:22 +00:00
target/arm: Recalculate hflags correctly after writes to CONTROL
A write to the CONTROL register can change our current EL (by writing to the nPRIV bit). That means that we can't assume that s->current_el is still valid in trans_MSR_v7m() when we try to rebuild the hflags. Add a new helper rebuild_hflags_m32_newel() which, like the existing rebuild_hflags_a32_newel(), recalculates the current EL from scratch, and use it in trans_MSR_v7m(). This fixes an assertion about an hflags mismatch when the guest changes privilege by writing to CONTROL. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200303174950.3298-4-peter.maydell@linaro.org
This commit is contained in:
parent
0ea9e6583b
commit
19717e9b44
@ -12468,6 +12468,18 @@ void arm_rebuild_hflags(CPUARMState *env)
|
|||||||
env->hflags = rebuild_hflags_internal(env);
|
env->hflags = rebuild_hflags_internal(env);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* If we have triggered a EL state change we can't rely on the
|
||||||
|
* translator having passed it to us, we need to recompute.
|
||||||
|
*/
|
||||||
|
void HELPER(rebuild_hflags_m32_newel)(CPUARMState *env)
|
||||||
|
{
|
||||||
|
int el = arm_current_el(env);
|
||||||
|
int fp_el = fp_exception_el(env, el);
|
||||||
|
ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el);
|
||||||
|
env->hflags = rebuild_hflags_m32(env, fp_el, mmu_idx);
|
||||||
|
}
|
||||||
|
|
||||||
void HELPER(rebuild_hflags_m32)(CPUARMState *env, int el)
|
void HELPER(rebuild_hflags_m32)(CPUARMState *env, int el)
|
||||||
{
|
{
|
||||||
int fp_el = fp_exception_el(env, el);
|
int fp_el = fp_exception_el(env, el);
|
||||||
|
@ -90,6 +90,7 @@ DEF_HELPER_4(msr_banked, void, env, i32, i32, i32)
|
|||||||
DEF_HELPER_2(get_user_reg, i32, env, i32)
|
DEF_HELPER_2(get_user_reg, i32, env, i32)
|
||||||
DEF_HELPER_3(set_user_reg, void, env, i32, i32)
|
DEF_HELPER_3(set_user_reg, void, env, i32, i32)
|
||||||
|
|
||||||
|
DEF_HELPER_FLAGS_1(rebuild_hflags_m32_newel, TCG_CALL_NO_RWG, void, env)
|
||||||
DEF_HELPER_FLAGS_2(rebuild_hflags_m32, TCG_CALL_NO_RWG, void, env, int)
|
DEF_HELPER_FLAGS_2(rebuild_hflags_m32, TCG_CALL_NO_RWG, void, env, int)
|
||||||
DEF_HELPER_FLAGS_1(rebuild_hflags_a32_newel, TCG_CALL_NO_RWG, void, env)
|
DEF_HELPER_FLAGS_1(rebuild_hflags_a32_newel, TCG_CALL_NO_RWG, void, env)
|
||||||
DEF_HELPER_FLAGS_2(rebuild_hflags_a32, TCG_CALL_NO_RWG, void, env, int)
|
DEF_HELPER_FLAGS_2(rebuild_hflags_a32, TCG_CALL_NO_RWG, void, env, int)
|
||||||
|
@ -8551,7 +8551,7 @@ static bool trans_MRS_v7m(DisasContext *s, arg_MRS_v7m *a)
|
|||||||
|
|
||||||
static bool trans_MSR_v7m(DisasContext *s, arg_MSR_v7m *a)
|
static bool trans_MSR_v7m(DisasContext *s, arg_MSR_v7m *a)
|
||||||
{
|
{
|
||||||
TCGv_i32 addr, reg, el;
|
TCGv_i32 addr, reg;
|
||||||
|
|
||||||
if (!arm_dc_feature(s, ARM_FEATURE_M)) {
|
if (!arm_dc_feature(s, ARM_FEATURE_M)) {
|
||||||
return false;
|
return false;
|
||||||
@ -8561,9 +8561,8 @@ static bool trans_MSR_v7m(DisasContext *s, arg_MSR_v7m *a)
|
|||||||
gen_helper_v7m_msr(cpu_env, addr, reg);
|
gen_helper_v7m_msr(cpu_env, addr, reg);
|
||||||
tcg_temp_free_i32(addr);
|
tcg_temp_free_i32(addr);
|
||||||
tcg_temp_free_i32(reg);
|
tcg_temp_free_i32(reg);
|
||||||
el = tcg_const_i32(s->current_el);
|
/* If we wrote to CONTROL, the EL might have changed */
|
||||||
gen_helper_rebuild_hflags_m32(cpu_env, el);
|
gen_helper_rebuild_hflags_m32_newel(cpu_env);
|
||||||
tcg_temp_free_i32(el);
|
|
||||||
gen_lookup_tb(s);
|
gen_lookup_tb(s);
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user