From 3f4919e49e28e161567b3730ef02b6904bfd9887 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Mon, 20 Aug 2018 19:28:03 +0200 Subject: [PATCH 1/4] hw/display/ramfb: Compile the ramfb code only when CONFIG_FW_CFG_DMA is set According to the ramfb_setup() function, the ramfb device needs fw_cfg with DMA, so we should also only compile and link it into those targets which support it, to avoid that the device shows up on systems where it can not be used at all (e.g. s390x). Signed-off-by: Thomas Huth Message-id: 1534786083-26559-1-git-send-email-thuth@redhat.com Signed-off-by: Gerd Hoffmann --- hw/display/Makefile.objs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/display/Makefile.objs b/hw/display/Makefile.objs index fb8408c6d0..a606fb7404 100644 --- a/hw/display/Makefile.objs +++ b/hw/display/Makefile.objs @@ -1,5 +1,5 @@ -common-obj-y += ramfb.o -common-obj-y += ramfb-standalone.o +common-obj-$(CONFIG_FW_CFG_DMA) += ramfb.o +common-obj-$(CONFIG_FW_CFG_DMA) += ramfb-standalone.o common-obj-$(CONFIG_ADS7846) += ads7846.o common-obj-$(CONFIG_VGA_CIRRUS) += cirrus_vga.o From 408e2f37be43392374d8bf9b0bfcfb1939bc6f69 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Fri, 10 Aug 2018 15:22:36 +0200 Subject: [PATCH 2/4] qxl: drop unused generation variable Signed-off-by: Gerd Hoffmann Reviewed-by: Peter Maydell Message-id: 20180810132236.25908-1-kraxel@redhat.com --- hw/display/qxl.c | 1 - hw/display/qxl.h | 1 - 2 files changed, 2 deletions(-) diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 830c392c53..8e9135d9c6 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -2057,7 +2057,6 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) qemu_spice_display_init_common(&qxl->ssd); qxl->mode = QXL_MODE_UNDEFINED; - qxl->generation = 1; qxl->num_memslots = NUM_MEMSLOTS; qemu_mutex_init(&qxl->track_lock); qemu_mutex_init(&qxl->async_lock); diff --git a/hw/display/qxl.h b/hw/display/qxl.h index 089696ef62..6eacba080d 100644 --- a/hw/display/qxl.h +++ b/hw/display/qxl.h @@ -43,7 +43,6 @@ typedef struct PCIQXLDevice { enum qxl_mode mode; uint32_t cmdflags; - int generation; uint32_t revision; int32_t num_memslots; From 5f92799877a266df3c0e0b085e5abda464c3ed9e Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 2 Aug 2018 16:51:46 +0100 Subject: [PATCH 3/4] hw/display/vga-isa-mm: Convert away from old_mmio MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert the vga-isa-mm device away from the old_mmio MemoryRegion accessors. This device is only used by the MIPS 'jazz' boards "magnum" and "pica61". Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Hervé Poussineau Tested-by: Hervé Poussineau Message-id: 20180802155147.1863-2-peter.maydell@linaro.org Signed-off-by: Gerd Hoffmann --- hw/display/vga-isa-mm.c | 60 +++++++++-------------------------------- 1 file changed, 13 insertions(+), 47 deletions(-) diff --git a/hw/display/vga-isa-mm.c b/hw/display/vga-isa-mm.c index 232216cad0..215e649719 100644 --- a/hw/display/vga-isa-mm.c +++ b/hw/display/vga-isa-mm.c @@ -36,64 +36,30 @@ typedef struct ISAVGAMMState { } ISAVGAMMState; /* Memory mapped interface */ -static uint32_t vga_mm_readb (void *opaque, hwaddr addr) +static uint64_t vga_mm_read(void *opaque, hwaddr addr, unsigned size) { ISAVGAMMState *s = opaque; - return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xff; + return vga_ioport_read(&s->vga, addr >> s->it_shift) & + MAKE_64BIT_MASK(0, size * 8); } -static void vga_mm_writeb (void *opaque, - hwaddr addr, uint32_t value) +static void vga_mm_write(void *opaque, hwaddr addr, uint64_t value, + unsigned size) { ISAVGAMMState *s = opaque; - vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff); -} - -static uint32_t vga_mm_readw (void *opaque, hwaddr addr) -{ - ISAVGAMMState *s = opaque; - - return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xffff; -} - -static void vga_mm_writew (void *opaque, - hwaddr addr, uint32_t value) -{ - ISAVGAMMState *s = opaque; - - vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff); -} - -static uint32_t vga_mm_readl (void *opaque, hwaddr addr) -{ - ISAVGAMMState *s = opaque; - - return vga_ioport_read(&s->vga, addr >> s->it_shift); -} - -static void vga_mm_writel (void *opaque, - hwaddr addr, uint32_t value) -{ - ISAVGAMMState *s = opaque; - - vga_ioport_write(&s->vga, addr >> s->it_shift, value); + vga_ioport_write(&s->vga, addr >> s->it_shift, + value & MAKE_64BIT_MASK(0, size * 8)); } static const MemoryRegionOps vga_mm_ctrl_ops = { - .old_mmio = { - .read = { - vga_mm_readb, - vga_mm_readw, - vga_mm_readl, - }, - .write = { - vga_mm_writeb, - vga_mm_writew, - vga_mm_writel, - }, - }, + .read = vga_mm_read, + .write = vga_mm_write, + .valid.min_access_size = 1, + .valid.max_access_size = 4, + .impl.min_access_size = 1, + .impl.max_access_size = 4, .endianness = DEVICE_NATIVE_ENDIAN, }; From 421ab725677b0382fd8f1fc5356fb16747a5beca Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 2 Aug 2018 16:51:47 +0100 Subject: [PATCH 4/4] hw/pci-host/bonito: Move away from old_mmio accessors Move away from the old_mmio MemoryRegion accessors in the bonito pci controller. This device is used only in the MIPS "fulong2e" machine. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20180802155147.1863-3-peter.maydell@linaro.org Signed-off-by: Gerd Hoffmann --- hw/pci-host/bonito.c | 145 +++++-------------------------------------- 1 file changed, 15 insertions(+), 130 deletions(-) diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 2d25e9bf7c..9868e2eccc 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -460,8 +460,8 @@ static uint32_t bonito_sbridge_pciaddr(void *opaque, hwaddr addr) return pciaddr; } -static void bonito_spciconf_writeb(void *opaque, hwaddr addr, - uint32_t val) +static void bonito_spciconf_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) { PCIBonitoState *s = opaque; PCIDevice *d = PCI_DEVICE(s); @@ -469,34 +469,8 @@ static void bonito_spciconf_writeb(void *opaque, hwaddr addr, uint32_t pciaddr; uint16_t status; - DPRINTF("bonito_spciconf_writeb "TARGET_FMT_plx" val %x\n", addr, val); - pciaddr = bonito_sbridge_pciaddr(s, addr); - - if (pciaddr == 0xffffffff) { - return; - } - - /* set the pci address in s->config_reg */ - phb->config_reg = (pciaddr) | (1u << 31); - pci_data_write(phb->bus, phb->config_reg, val & 0xff, 1); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status = pci_get_word(d->config + PCI_STATUS); - status &= ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT); - pci_set_word(d->config + PCI_STATUS, status); -} - -static void bonito_spciconf_writew(void *opaque, hwaddr addr, - uint32_t val) -{ - PCIBonitoState *s = opaque; - PCIDevice *d = PCI_DEVICE(s); - PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_writew "TARGET_FMT_plx" val %x\n", addr, val); - assert((addr & 0x1) == 0); + DPRINTF("bonito_spciconf_write "TARGET_FMT_plx" size %d val %x\n", + addr, size, val); pciaddr = bonito_sbridge_pciaddr(s, addr); @@ -506,7 +480,7 @@ static void bonito_spciconf_writew(void *opaque, hwaddr addr, /* set the pci address in s->config_reg */ phb->config_reg = (pciaddr) | (1u << 31); - pci_data_write(phb->bus, phb->config_reg, val, 2); + pci_data_write(phb->bus, phb->config_reg, val, size); /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ status = pci_get_word(d->config + PCI_STATUS); @@ -514,8 +488,7 @@ static void bonito_spciconf_writew(void *opaque, hwaddr addr, pci_set_word(d->config + PCI_STATUS, status); } -static void bonito_spciconf_writel(void *opaque, hwaddr addr, - uint32_t val) +static uint64_t bonito_spciconf_read(void *opaque, hwaddr addr, unsigned size) { PCIBonitoState *s = opaque; PCIDevice *d = PCI_DEVICE(s); @@ -523,38 +496,12 @@ static void bonito_spciconf_writel(void *opaque, hwaddr addr, uint32_t pciaddr; uint16_t status; - DPRINTF("bonito_spciconf_writel "TARGET_FMT_plx" val %x\n", addr, val); - assert((addr & 0x3) == 0); + DPRINTF("bonito_spciconf_read "TARGET_FMT_plx" size %d\n", addr, size); pciaddr = bonito_sbridge_pciaddr(s, addr); if (pciaddr == 0xffffffff) { - return; - } - - /* set the pci address in s->config_reg */ - phb->config_reg = (pciaddr) | (1u << 31); - pci_data_write(phb->bus, phb->config_reg, val, 4); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status = pci_get_word(d->config + PCI_STATUS); - status &= ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT); - pci_set_word(d->config + PCI_STATUS, status); -} - -static uint32_t bonito_spciconf_readb(void *opaque, hwaddr addr) -{ - PCIBonitoState *s = opaque; - PCIDevice *d = PCI_DEVICE(s); - PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_readb "TARGET_FMT_plx"\n", addr); - pciaddr = bonito_sbridge_pciaddr(s, addr); - - if (pciaddr == 0xffffffff) { - return 0xff; + return MAKE_64BIT_MASK(0, size * 8); } /* set the pci address in s->config_reg */ @@ -565,79 +512,17 @@ static uint32_t bonito_spciconf_readb(void *opaque, hwaddr addr) status &= ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT); pci_set_word(d->config + PCI_STATUS, status); - return pci_data_read(phb->bus, phb->config_reg, 1); -} - -static uint32_t bonito_spciconf_readw(void *opaque, hwaddr addr) -{ - PCIBonitoState *s = opaque; - PCIDevice *d = PCI_DEVICE(s); - PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_readw "TARGET_FMT_plx"\n", addr); - assert((addr & 0x1) == 0); - - pciaddr = bonito_sbridge_pciaddr(s, addr); - - if (pciaddr == 0xffffffff) { - return 0xffff; - } - - /* set the pci address in s->config_reg */ - phb->config_reg = (pciaddr) | (1u << 31); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status = pci_get_word(d->config + PCI_STATUS); - status &= ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT); - pci_set_word(d->config + PCI_STATUS, status); - - return pci_data_read(phb->bus, phb->config_reg, 2); -} - -static uint32_t bonito_spciconf_readl(void *opaque, hwaddr addr) -{ - PCIBonitoState *s = opaque; - PCIDevice *d = PCI_DEVICE(s); - PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_readl "TARGET_FMT_plx"\n", addr); - assert((addr & 0x3) == 0); - - pciaddr = bonito_sbridge_pciaddr(s, addr); - - if (pciaddr == 0xffffffff) { - return 0xffffffff; - } - - /* set the pci address in s->config_reg */ - phb->config_reg = (pciaddr) | (1u << 31); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status = pci_get_word(d->config + PCI_STATUS); - status &= ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT); - pci_set_word(d->config + PCI_STATUS, status); - - return pci_data_read(phb->bus, phb->config_reg, 4); + return pci_data_read(phb->bus, phb->config_reg, size); } /* south bridge PCI configure space. 0x1fe8 0000 - 0x1fef ffff */ static const MemoryRegionOps bonito_spciconf_ops = { - .old_mmio = { - .read = { - bonito_spciconf_readb, - bonito_spciconf_readw, - bonito_spciconf_readl, - }, - .write = { - bonito_spciconf_writeb, - bonito_spciconf_writew, - bonito_spciconf_writel, - }, - }, + .read = bonito_spciconf_read, + .write = bonito_spciconf_write, + .valid.min_access_size = 1, + .valid.max_access_size = 4, + .impl.min_access_size = 1, + .impl.max_access_size = 4, .endianness = DEVICE_NATIVE_ENDIAN, };