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lahf/sahf cpuid test

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4523 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2008-05-22 10:13:38 +00:00
parent 1b9d9ebb8a
commit 12e26b75d4
2 changed files with 6 additions and 9 deletions
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9
target-i386/TODO
View File

@ -1,16 +1,10 @@
Correctness issues: Correctness issues:
- some eflags manipulation incorrectly reset the bit 0x2. - some eflags manipulation incorrectly reset the bit 0x2.
- rework eflags optimization (will be a consequence of TCG port)
- SVM: rework the implementation: simplify code, move most intercept - SVM: rework the implementation: simplify code, move most intercept
tests as dynamic, correct segment access, verify exception safety, tests as dynamic, correct segment access, verify exception safety,
cpu save/restore, SMM save/restore. cpu save/restore, SMM save/restore.
- x86_64: fxsave/fxrestore intel/amd differences
- x86_64: lcall/ljmp intel/amd differences ? - x86_64: lcall/ljmp intel/amd differences ?
- x86_64: cmpxchgl intel/amd differences ?
- x86_64: cmovl intel/amd differences ?
- cmpxchg16b + cmpxchg8b cpuid test
- x86: monitor invalid
- better code fetch (different exception handling + CS.limit support) - better code fetch (different exception handling + CS.limit support)
- user/kernel PUSHL/POPL in helper.c - user/kernel PUSHL/POPL in helper.c
- add missing cpuid tests - add missing cpuid tests
@ -27,11 +21,12 @@ Correctness issues:
Optimizations/Features: Optimizations/Features:
- finish TCG port
- add SVM nested paging support - add SVM nested paging support
- add VMX support - add VMX support
- add AVX support - add AVX support
- add SSE5 support - add SSE5 support
- fxsave/fxrstor AMD extensions
- improve monitor/mwait support
- faster EFLAGS update: consider SZAP, C, O can be updated separately - faster EFLAGS update: consider SZAP, C, O can be updated separately
with a bit field in CC_OP and more state variables. with a bit field in CC_OP and more state variables.
- evaluate x87 stack pointer statically - evaluate x87 stack pointer statically

6
target-i386/translate.c
View File

@ -103,6 +103,7 @@ typedef struct DisasContext {
int cpuid_features; int cpuid_features;
int cpuid_ext_features; int cpuid_ext_features;
int cpuid_ext2_features; int cpuid_ext2_features;
int cpuid_ext3_features;
} DisasContext; } DisasContext;
static void gen_eob(DisasContext *s); static void gen_eob(DisasContext *s);
@ -5829,7 +5830,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
} }
break; break;
case 0x9e: /* sahf */ case 0x9e: /* sahf */
if (CODE64(s)) if (CODE64(s) && !(s->cpuid_ext3_features & CPUID_EXT3_LAHF_LM))
goto illegal_op; goto illegal_op;
gen_op_mov_TN_reg(OT_BYTE, 0, R_AH); gen_op_mov_TN_reg(OT_BYTE, 0, R_AH);
if (s->cc_op != CC_OP_DYNAMIC) if (s->cc_op != CC_OP_DYNAMIC)
@ -5841,7 +5842,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
s->cc_op = CC_OP_EFLAGS; s->cc_op = CC_OP_EFLAGS;
break; break;
case 0x9f: /* lahf */ case 0x9f: /* lahf */
if (CODE64(s)) if (CODE64(s) && !(s->cpuid_ext3_features & CPUID_EXT3_LAHF_LM))
goto illegal_op; goto illegal_op;
if (s->cc_op != CC_OP_DYNAMIC) if (s->cc_op != CC_OP_DYNAMIC)
gen_op_set_cc_op(s->cc_op); gen_op_set_cc_op(s->cc_op);
@ -7058,6 +7059,7 @@ static inline int gen_intermediate_code_internal(CPUState *env,
dc->cpuid_features = env->cpuid_features; dc->cpuid_features = env->cpuid_features;
dc->cpuid_ext_features = env->cpuid_ext_features; dc->cpuid_ext_features = env->cpuid_ext_features;
dc->cpuid_ext2_features = env->cpuid_ext2_features; dc->cpuid_ext2_features = env->cpuid_ext2_features;
dc->cpuid_ext3_features = env->cpuid_ext3_features;
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
dc->lma = (flags >> HF_LMA_SHIFT) & 1; dc->lma = (flags >> HF_LMA_SHIFT) & 1;
dc->code64 = (flags >> HF_CS64_SHIFT) & 1; dc->code64 = (flags >> HF_CS64_SHIFT) & 1;