TCGify a few more instructions.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4736 c046a42c-6fe2-441c-8c8c-71466251a162

target-mips/exec.h

@@ -78,7 +78,6 @@ void fpu_dump_state(CPUState *env, FILE *f,
                     int (*fpu_fprintf)(FILE *f, const char *fmt, ...),
                     int flags);
 void dump_sc (void);
-void do_pmon (int function);
 
 int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
                                int mmu_idx, int is_softmmu);

target-mips/helper.h

@@ -202,3 +202,7 @@ FOP_PROTO(nge)
 FOP_PROTO(le)
 FOP_PROTO(ngt)
 #undef FOP_PROTO
+
+/* Special functions */
+DEF_HELPER(void, do_pmon, (int function))
+DEF_HELPER(void, do_wait, (void))

target-mips/op.c

@@ -651,18 +651,6 @@ FLOAT_OP(alnv, ps)
     FORCE_RET();
 }
 
-#ifdef CONFIG_SOFTFLOAT
-#define clear_invalid() do {                                \
-    int flags = get_float_exception_flags(&env->fpu->fp_status); \
-    flags &= ~float_flag_invalid;                           \
-    set_float_exception_flags(flags, &env->fpu->fp_status); \
-} while(0)
-#else
-#define clear_invalid() do { } while(0)
-#endif
-
-extern void dump_fpu_s(CPUState *env);
-
 void op_bc1f (void)
 {
     T0 = !!(~GET_FP_COND(env->fpu) & (0x1 << PARAM1));
@@ -701,44 +689,7 @@ void op_bc1any4t (void)
     FORCE_RET();
 }
 
-void op_tlbwi (void)
-{
-    CALL_FROM_TB0(env->tlb->do_tlbwi);
-    FORCE_RET();
-}
-
-void op_tlbwr (void)
-{
-    CALL_FROM_TB0(env->tlb->do_tlbwr);
-    FORCE_RET();
-}
-
-void op_tlbp (void)
-{
-    CALL_FROM_TB0(env->tlb->do_tlbp);
-    FORCE_RET();
-}
-
-void op_tlbr (void)
-{
-    CALL_FROM_TB0(env->tlb->do_tlbr);
-    FORCE_RET();
-}
-
 /* Specials */
-#if defined (CONFIG_USER_ONLY)
-void op_tls_value (void)
-{
-    T0 = env->tls_value;
-}
-#endif
-
-void op_pmon (void)
-{
-    CALL_FROM_TB1(do_pmon, PARAM1);
-    FORCE_RET();
-}
-
 void op_di (void)
 {
     T0 = env->CP0_Status;
@@ -755,20 +706,6 @@ void op_ei (void)
     FORCE_RET();
 }
 
-void op_trap (void)
-{
-    if (T0) {
-        CALL_FROM_TB1(do_raise_exception, EXCP_TRAP);
-    }
-    FORCE_RET();
-}
-
-void op_debug (void)
-{
-    CALL_FROM_TB1(do_raise_exception, EXCP_DEBUG);
-    FORCE_RET();
-}
-
 void debug_pre_eret (void);
 void debug_post_eret (void);
 void op_eret (void)
@@ -842,19 +779,6 @@ void op_rdhwr_ccres(void)
     FORCE_RET();
 }
 
-void op_save_state (void)
-{
-    env->hflags = PARAM1;
-    FORCE_RET();
-}
-
-void op_wait (void)
-{
-    env->halted = 1;
-    CALL_FROM_TB1(do_raise_exception, EXCP_HLT);
-    FORCE_RET();
-}
-
 /* Bitfield operations. */
 void op_ext(void)
 {

target-mips/op_helper.c

@@ -1401,6 +1401,12 @@ void do_pmon (int function)
     }
 }
 
+void do_wait (void)
+{
+    env->halted = 1;
+    do_raise_exception(EXCP_HLT);
+}
+
 #if !defined(CONFIG_USER_ONLY)
 
 static void do_unaligned_access (target_ulong addr, int is_write, int is_user, void *retaddr);

target-mips/translate.c

@@ -789,7 +789,11 @@ static always_inline void save_cpu_state (DisasContext *ctx, int do_save_pc)
         ctx->saved_pc = ctx->pc;
     }
     if (ctx->hflags != ctx->saved_hflags) {
-        gen_op_save_state(ctx->hflags);
+        TCGv r_tmp = tcg_temp_new(TCG_TYPE_I32);
+
+        tcg_gen_movi_i32(r_tmp, ctx->hflags);
+        tcg_gen_st_i32(r_tmp, cpu_env, offsetof(CPUState, hflags));
+        tcg_temp_free(r_tmp);
         ctx->saved_hflags = ctx->hflags;
         switch (ctx->hflags & MIPS_HFLAG_BMASK) {
         case MIPS_HFLAG_BR:
@@ -2238,7 +2242,13 @@ static void gen_trap (DisasContext *ctx, uint32_t opc,
         }
     }
     save_cpu_state(ctx, 1);
-    gen_op_trap();
+    {
+        int l1 = gen_new_label();
+
+        tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, l1);
+        tcg_gen_helper_0_1i(do_raise_exception, EXCP_TRAP);
+        gen_set_label(l1);
+    }
     ctx->bstate = BS_STOP;
 }
 
@@ -5316,25 +5326,25 @@ static void gen_cp0 (CPUState *env, DisasContext *ctx, uint32_t opc, int rt, int
         opn = "tlbwi";
         if (!env->tlb->do_tlbwi)
             goto die;
-        gen_op_tlbwi();
+        tcg_gen_helper_0_0(env->tlb->do_tlbwi);
         break;
     case OPC_TLBWR:
         opn = "tlbwr";
         if (!env->tlb->do_tlbwr)
             goto die;
-        gen_op_tlbwr();
+        tcg_gen_helper_0_0(env->tlb->do_tlbwr);
         break;
     case OPC_TLBP:
         opn = "tlbp";
         if (!env->tlb->do_tlbp)
             goto die;
-        gen_op_tlbp();
+        tcg_gen_helper_0_0(env->tlb->do_tlbp);
         break;
     case OPC_TLBR:
         opn = "tlbr";
         if (!env->tlb->do_tlbr)
             goto die;
-        gen_op_tlbr();
+        tcg_gen_helper_0_0(env->tlb->do_tlbr);
         break;
     case OPC_ERET:
         opn = "eret";
@@ -5362,7 +5372,7 @@ static void gen_cp0 (CPUState *env, DisasContext *ctx, uint32_t opc, int rt, int
         ctx->pc += 4;
         save_cpu_state(ctx, 1);
         ctx->pc -= 4;
-        gen_op_wait();
+        tcg_gen_helper_0_0(do_wait);
         ctx->bstate = BS_EXCP;
         break;
     default:
@@ -6617,7 +6627,13 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
         tcg_gen_ld_tl(r_tmp, cpu_env, offsetof(CPUState, bcond));
         tcg_gen_brcondi_tl(TCG_COND_NE, r_tmp, 0, l1);
         tcg_temp_free(r_tmp);
-        gen_op_save_state(ctx->hflags & ~MIPS_HFLAG_BMASK);
+        {
+            TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I32);
+
+            tcg_gen_movi_i32(r_tmp2, ctx->hflags & ~MIPS_HFLAG_BMASK);
+            tcg_gen_st_i32(r_tmp2, cpu_env, offsetof(CPUState, hflags));
+            tcg_temp_free(r_tmp2);
+        }
         gen_goto_tb(ctx, 1, ctx->pc + 4);
         gen_set_label(l1);
     }
@@ -6671,7 +6687,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
             MIPS_INVAL("PMON / selsl");
             generate_exception(ctx, EXCP_RI);
 #else
-            gen_op_pmon(sa);
+            tcg_gen_helper_0_1i(do_pmon, sa);
 #endif
             break;
         case OPC_SYSCALL:
@@ -6827,7 +6843,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
                 break;
             case 29:
 #if defined (CONFIG_USER_ONLY)
-                gen_op_tls_value();
+                tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUState, tls_value));
                 break;
 #endif
             default:            /* Invalid */
@@ -7243,7 +7259,7 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
                 if (env->breakpoints[j] == ctx.pc) {
                     save_cpu_state(&ctx, 1);
                     ctx.bstate = BS_BRANCH;
-                    gen_op_debug();
+                    tcg_gen_helper_0_1i(do_raise_exception, EXCP_DEBUG);
                     /* Include the breakpoint location or the tb won't
                      * be flushed when it must be.  */
                     ctx.pc += 4;
@@ -7285,7 +7301,7 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
     }
     if (env->singlestep_enabled) {
         save_cpu_state(&ctx, ctx.bstate == BS_NONE);
-        gen_op_debug();
+        tcg_gen_helper_0_1i(do_raise_exception, EXCP_DEBUG);
     } else {
 	switch (ctx.bstate) {
         case BS_STOP: