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Implement a sample DAMON module that shows how self-tuned DAMON-based memory tiering can be written. It is a sample since the purpose is to give an idea about how it can be implemented and perform, rather than be used on general production setups. Especially, it supports only two tiers memory setup having only one CPU-attached NUMA node. [sj@kernel.org: fix wrong DAMON attrs setting] Link: https://lkml.kernel.org/r/20250510220932.47722-1-sj@kernel.org [sj@kernel.org: trigger build even if only mtier is enabled] Link: https://lkml.kernel.org/r/20250426184054.11437-1-sj@kernel.org Link: https://lkml.kernel.org/r/20250420194030.75838-8-sj@kernel.org Signed-off-by: SeongJae Park <sj@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Yunjeong Mun <yunjeong.mun@sk.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
44 lines
1.3 KiB
Plaintext
44 lines
1.3 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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menu "DAMON Samples"
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config SAMPLE_DAMON_WSSE
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bool "DAMON sample module for working set size estimation"
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depends on DAMON && DAMON_VADDR
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help
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This builds DAMON sample module for working set size estimation.
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The module receives a pid, monitor access to the virtual address
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space of the process, estimate working set size of the process, and
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repeatedly prints the size on the kernel log.
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If unsure, say N.
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config SAMPLE_DAMON_PRCL
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bool "DAMON sample module for access-aware proactive reclamation"
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depends on DAMON && DAMON_VADDR
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help
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This builds DAMON sample module for access-aware proactive
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reclamation.
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The module receives a pid, monitor access to the virtual address
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space of the process, find memory regions that not accessed, and
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proactively reclaim the regions.
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If unsure, say N.
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config SAMPLE_DAMON_MTIER
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bool "DAMON sample module for memory tiering"
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depends on DAMON && DAMON_PADDR
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help
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Thps builds DAMON sample module for memory tierign.
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The module assumes the system is constructed with two NUMA nodes,
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which seems as local and remote nodes to all CPUs. For example,
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node0 is for DDR5 DRAMs connected via DIMM, while node1 is for DDR4
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DRAMs connected via CXL.
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If unsure, say N.
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endmenu
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