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0184b4fdba
DSP on i.MX8MP doesn't have a direct reset line so according to hardware design team in order to handle assert/deassert/reset functionality we need to use a combination of control bits from two modules. Audio block control module for Run/Stall control of the DSP and DAP module in order to do software reset. In a first step, for i.MX8MP we are switching on using the reset controller API to handle the DSP Run/Stall bits i.MX8MP. This comes with the advantage of offering a better probe ordering and a more natural way of abstracting the Audio block control bits. Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20250311085812.1296243-9-daniel.baluta@nxp.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
48 lines
996 B
C
48 lines
996 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
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* Copyright 2021 NXP
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*/
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#ifndef _IMX_RPROC_H
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#define _IMX_RPROC_H
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/* address translation table */
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struct imx_rproc_att {
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u32 da; /* device address (From Cortex M4 view)*/
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u32 sa; /* system bus address */
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u32 size; /* size of reg range */
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int flags;
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};
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/* Remote core start/stop method */
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enum imx_rproc_method {
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IMX_RPROC_NONE,
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/* Through syscon regmap */
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IMX_RPROC_MMIO,
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/* Through ARM SMCCC */
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IMX_RPROC_SMC,
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/* Through System Control Unit API */
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IMX_RPROC_SCU_API,
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/* Through Reset Controller API */
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IMX_RPROC_RESET_CONTROLLER,
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};
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/* dcfg flags */
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#define IMX_RPROC_NEED_SYSTEM_OFF BIT(0)
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struct imx_rproc_dcfg {
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u32 src_reg;
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u32 src_mask;
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u32 src_start;
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u32 src_stop;
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u32 gpr_reg;
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u32 gpr_wait;
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const struct imx_rproc_att *att;
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size_t att_size;
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enum imx_rproc_method method;
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u32 flags;
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};
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#endif /* _IMX_RPROC_H */
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