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Add runtime PM since we might call populate_mm on a foreign device. v3: - Fix a kerneldoc failure (Matt Brost) - Revert the bo type change from device to kernel (Matt Brost) v4: - Add an assert in xe_svm_alloc_vram (Matt Brost) Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20250619134035.170086-4-thomas.hellstrom@linux.intel.com
322 lines
7.0 KiB
C
322 lines
7.0 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2024 Intel Corporation
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*/
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#ifndef _XE_SVM_H_
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#define _XE_SVM_H_
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#if IS_ENABLED(CONFIG_DRM_XE_GPUSVM)
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#include <drm/drm_pagemap.h>
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#include <drm/drm_gpusvm.h>
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#define XE_INTERCONNECT_VRAM DRM_INTERCONNECT_DRIVER
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struct xe_bo;
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struct xe_gt;
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struct xe_tile;
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struct xe_vm;
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struct xe_vma;
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struct xe_vram_region;
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/** struct xe_svm_range - SVM range */
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struct xe_svm_range {
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/** @base: base drm_gpusvm_range */
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struct drm_gpusvm_range base;
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/**
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* @garbage_collector_link: Link into VM's garbage collect SVM range
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* list. Protected by VM's garbage collect lock.
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*/
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struct list_head garbage_collector_link;
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/**
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* @tile_present: Tile mask of binding is present for this range.
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* Protected by GPU SVM notifier lock.
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*/
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u8 tile_present;
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/**
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* @tile_invalidated: Tile mask of binding is invalidated for this
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* range. Protected by GPU SVM notifier lock.
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*/
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u8 tile_invalidated;
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};
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/**
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* xe_svm_range_pages_valid() - SVM range pages valid
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* @range: SVM range
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*
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* Return: True if SVM range pages are valid, False otherwise
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*/
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static inline bool xe_svm_range_pages_valid(struct xe_svm_range *range)
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{
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return drm_gpusvm_range_pages_valid(range->base.gpusvm, &range->base);
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}
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int xe_devm_add(struct xe_tile *tile, struct xe_vram_region *vr);
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int xe_svm_init(struct xe_vm *vm);
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void xe_svm_fini(struct xe_vm *vm);
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void xe_svm_close(struct xe_vm *vm);
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int xe_svm_handle_pagefault(struct xe_vm *vm, struct xe_vma *vma,
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struct xe_gt *gt, u64 fault_addr,
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bool atomic);
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bool xe_svm_has_mapping(struct xe_vm *vm, u64 start, u64 end);
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int xe_svm_bo_evict(struct xe_bo *bo);
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void xe_svm_range_debug(struct xe_svm_range *range, const char *operation);
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int xe_svm_alloc_vram(struct xe_tile *tile, struct xe_svm_range *range,
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const struct drm_gpusvm_ctx *ctx);
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struct xe_svm_range *xe_svm_range_find_or_insert(struct xe_vm *vm, u64 addr,
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struct xe_vma *vma, struct drm_gpusvm_ctx *ctx);
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int xe_svm_range_get_pages(struct xe_vm *vm, struct xe_svm_range *range,
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struct drm_gpusvm_ctx *ctx);
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bool xe_svm_range_needs_migrate_to_vram(struct xe_svm_range *range, struct xe_vma *vma,
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bool preferred_region_is_vram);
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void xe_svm_range_migrate_to_smem(struct xe_vm *vm, struct xe_svm_range *range);
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bool xe_svm_range_validate(struct xe_vm *vm,
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struct xe_svm_range *range,
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u8 tile_mask, bool devmem_preferred);
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u64 xe_svm_find_vma_start(struct xe_vm *vm, u64 addr, u64 end, struct xe_vma *vma);
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/**
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* xe_svm_range_has_dma_mapping() - SVM range has DMA mapping
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* @range: SVM range
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*
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* Return: True if SVM range has a DMA mapping, False otherwise
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*/
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static inline bool xe_svm_range_has_dma_mapping(struct xe_svm_range *range)
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{
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lockdep_assert_held(&range->base.gpusvm->notifier_lock);
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return range->base.flags.has_dma_mapping;
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}
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/**
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* to_xe_range - Convert a drm_gpusvm_range pointer to a xe_svm_range
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* @r: Pointer to the drm_gpusvm_range structure
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*
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* This function takes a pointer to a drm_gpusvm_range structure and
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* converts it to a pointer to the containing xe_svm_range structure.
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*
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* Return: Pointer to the xe_svm_range structure
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*/
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static inline struct xe_svm_range *to_xe_range(struct drm_gpusvm_range *r)
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{
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return container_of(r, struct xe_svm_range, base);
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}
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/**
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* xe_svm_range_start() - SVM range start address
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* @range: SVM range
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*
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* Return: start address of range.
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*/
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static inline unsigned long xe_svm_range_start(struct xe_svm_range *range)
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{
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return drm_gpusvm_range_start(&range->base);
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}
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/**
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* xe_svm_range_end() - SVM range end address
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* @range: SVM range
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*
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* Return: end address of range.
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*/
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static inline unsigned long xe_svm_range_end(struct xe_svm_range *range)
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{
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return drm_gpusvm_range_end(&range->base);
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}
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/**
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* xe_svm_range_size() - SVM range size
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* @range: SVM range
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*
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* Return: Size of range.
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*/
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static inline unsigned long xe_svm_range_size(struct xe_svm_range *range)
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{
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return drm_gpusvm_range_size(&range->base);
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}
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#define xe_svm_assert_in_notifier(vm__) \
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lockdep_assert_held_write(&(vm__)->svm.gpusvm.notifier_lock)
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#define xe_svm_notifier_lock(vm__) \
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drm_gpusvm_notifier_lock(&(vm__)->svm.gpusvm)
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#define xe_svm_notifier_unlock(vm__) \
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drm_gpusvm_notifier_unlock(&(vm__)->svm.gpusvm)
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void xe_svm_flush(struct xe_vm *vm);
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#else
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#include <linux/interval_tree.h>
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struct drm_pagemap_device_addr;
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struct drm_gpusvm_ctx;
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struct drm_gpusvm_range;
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struct xe_bo;
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struct xe_gt;
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struct xe_vm;
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struct xe_vma;
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struct xe_tile;
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struct xe_vram_region;
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#define XE_INTERCONNECT_VRAM 1
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struct xe_svm_range {
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struct {
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struct interval_tree_node itree;
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const struct drm_pagemap_device_addr *dma_addr;
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} base;
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u32 tile_present;
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u32 tile_invalidated;
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};
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static inline bool xe_svm_range_pages_valid(struct xe_svm_range *range)
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{
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return false;
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}
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static inline
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int xe_devm_add(struct xe_tile *tile, struct xe_vram_region *vr)
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{
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return 0;
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}
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static inline
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int xe_svm_init(struct xe_vm *vm)
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{
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return 0;
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}
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static inline
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void xe_svm_fini(struct xe_vm *vm)
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{
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}
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static inline
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void xe_svm_close(struct xe_vm *vm)
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{
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}
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static inline
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int xe_svm_handle_pagefault(struct xe_vm *vm, struct xe_vma *vma,
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struct xe_gt *gt, u64 fault_addr,
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bool atomic)
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{
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return 0;
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}
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static inline
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bool xe_svm_has_mapping(struct xe_vm *vm, u64 start, u64 end)
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{
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return false;
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}
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static inline
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int xe_svm_bo_evict(struct xe_bo *bo)
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{
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return 0;
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}
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static inline
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void xe_svm_range_debug(struct xe_svm_range *range, const char *operation)
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{
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}
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static inline int
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xe_svm_alloc_vram(struct xe_tile *tile, struct xe_svm_range *range,
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const struct drm_gpusvm_ctx *ctx)
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{
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return -EOPNOTSUPP;
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}
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static inline
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struct xe_svm_range *xe_svm_range_find_or_insert(struct xe_vm *vm, u64 addr,
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struct xe_vma *vma, struct drm_gpusvm_ctx *ctx)
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{
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return ERR_PTR(-EINVAL);
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}
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static inline
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int xe_svm_range_get_pages(struct xe_vm *vm, struct xe_svm_range *range,
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struct drm_gpusvm_ctx *ctx)
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{
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return -EINVAL;
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}
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static inline struct xe_svm_range *to_xe_range(struct drm_gpusvm_range *r)
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{
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return NULL;
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}
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static inline unsigned long xe_svm_range_start(struct xe_svm_range *range)
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{
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return 0;
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}
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static inline unsigned long xe_svm_range_end(struct xe_svm_range *range)
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{
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return 0;
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}
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static inline unsigned long xe_svm_range_size(struct xe_svm_range *range)
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{
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return 0;
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}
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static inline
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bool xe_svm_range_needs_migrate_to_vram(struct xe_svm_range *range, struct xe_vma *vma,
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u32 region)
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{
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return false;
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}
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static inline
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void xe_svm_range_migrate_to_smem(struct xe_vm *vm, struct xe_svm_range *range)
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{
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}
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static inline
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bool xe_svm_range_validate(struct xe_vm *vm,
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struct xe_svm_range *range,
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u8 tile_mask, bool devmem_preferred)
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{
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return false;
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}
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static inline
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u64 xe_svm_find_vma_start(struct xe_vm *vm, u64 addr, u64 end, struct xe_vma *vma)
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{
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return ULONG_MAX;
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}
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#define xe_svm_assert_in_notifier(...) do {} while (0)
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#define xe_svm_range_has_dma_mapping(...) false
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static inline void xe_svm_notifier_lock(struct xe_vm *vm)
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{
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}
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static inline void xe_svm_notifier_unlock(struct xe_vm *vm)
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{
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}
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static inline void xe_svm_flush(struct xe_vm *vm)
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{
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}
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#endif
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#endif
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