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aded26ccaa
I was debugging some unrelated issue and noticed the current code was
very verbose. We can improve it easily by using the more common batch
buffer building pattern.
Before:
bb->cs[bb->len++] = MI_LOAD_REGISTER_REG | MI_LRR_DST_CS_MMIO;
c4d: 41 8b 56 10 mov 0x10(%r14),%edx
c51: 49 8b 4e 08 mov 0x8(%r14),%rcx
c55: 8d 72 01 lea 0x1(%rdx),%esi
c58: 41 89 76 10 mov %esi,0x10(%r14)
c5c: c7 04 91 01 00 08 15 movl $0x15080001,(%rcx,%rdx,4)
bb->cs[bb->len++] = entry->reg.addr;
c63: 8b 08 mov (%rax),%ecx
c65: 41 8b 56 10 mov 0x10(%r14),%edx
c69: 49 8b 76 08 mov 0x8(%r14),%rsi
c6d: 81 e1 ff ff 3f 00 and $0x3fffff,%ecx
c73: 8d 7a 01 lea 0x1(%rdx),%edi
c76: 41 89 7e 10 mov %edi,0x10(%r14)
c7a: 89 0c 96 mov %ecx,(%rsi,%rdx,4)
..etc..
After:
*cs++ = MI_LOAD_REGISTER_REG | MI_LRR_DST_CS_MMIO;
c52: 41 c7 04 24 01 00 08 movl $0x15080001,(%r12)
c59: 15
*cs++ = entry->reg.addr;
c5a: 8b 10 mov (%rax),%edx
..etc..
Resulting in the following binary change:
add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-348 (-348)
Function old new delta
xe_gt_record_default_lrcs.cold 304 296 -8
xe_gt_record_default_lrcs 2200 1860 -340
Total: Before=13554, After=13206, chg -2.57%
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/20250710-lrc-refactors-v2-7-a5e2ca03f6bd@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
143 lines
4.1 KiB
C
143 lines
4.1 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#ifndef _XE_LRC_H_
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#define _XE_LRC_H_
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#include <linux/types.h>
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#include "xe_lrc_types.h"
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struct drm_printer;
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struct xe_bb;
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struct xe_device;
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struct xe_exec_queue;
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enum xe_engine_class;
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struct xe_gt;
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struct xe_hw_engine;
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struct xe_lrc;
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struct xe_vm;
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struct xe_lrc_snapshot {
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struct xe_bo *lrc_bo;
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void *lrc_snapshot;
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unsigned long lrc_size, lrc_offset;
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u32 context_desc;
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u32 ring_addr;
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u32 indirect_context_desc;
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u32 head;
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u32 start;
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struct {
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u32 internal;
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u32 memory;
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} tail;
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u32 start_seqno;
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u32 seqno;
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u32 ctx_timestamp;
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u32 ctx_job_timestamp;
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};
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#define LRC_PPHWSP_FLUSH_INVAL_SCRATCH_ADDR (0x34 * 4)
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#define LRC_PPHWSP_PXP_INVAL_SCRATCH_ADDR (0x40 * 4)
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#define XE_LRC_CREATE_RUNALONE 0x1
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#define XE_LRC_CREATE_PXP 0x2
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struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
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u32 ring_size, u16 msix_vec, u32 flags);
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void xe_lrc_destroy(struct kref *ref);
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/**
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* xe_lrc_get - Get reference to the LRC
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* @lrc: Logical Ring Context
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*
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* Increment reference count of @lrc
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*/
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static inline struct xe_lrc *xe_lrc_get(struct xe_lrc *lrc)
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{
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kref_get(&lrc->refcount);
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return lrc;
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}
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/**
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* xe_lrc_put - Put reference of the LRC
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* @lrc: Logical Ring Context
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*
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* Decrement reference count of @lrc, call xe_lrc_destroy when
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* reference count reaches 0.
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*/
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static inline void xe_lrc_put(struct xe_lrc *lrc)
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{
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kref_put(&lrc->refcount, xe_lrc_destroy);
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}
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size_t xe_gt_lrc_size(struct xe_gt *gt, enum xe_engine_class class);
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u32 xe_lrc_pphwsp_offset(struct xe_lrc *lrc);
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u32 xe_lrc_regs_offset(struct xe_lrc *lrc);
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void xe_lrc_set_ring_tail(struct xe_lrc *lrc, u32 tail);
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u32 xe_lrc_ring_tail(struct xe_lrc *lrc);
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void xe_lrc_set_ring_head(struct xe_lrc *lrc, u32 head);
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u32 xe_lrc_ring_head(struct xe_lrc *lrc);
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u32 xe_lrc_ring_space(struct xe_lrc *lrc);
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void xe_lrc_write_ring(struct xe_lrc *lrc, const void *data, size_t size);
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bool xe_lrc_ring_is_idle(struct xe_lrc *lrc);
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u32 xe_lrc_indirect_ring_ggtt_addr(struct xe_lrc *lrc);
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u32 xe_lrc_ggtt_addr(struct xe_lrc *lrc);
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u32 *xe_lrc_regs(struct xe_lrc *lrc);
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u32 xe_lrc_read_ctx_reg(struct xe_lrc *lrc, int reg_nr);
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void xe_lrc_write_ctx_reg(struct xe_lrc *lrc, int reg_nr, u32 val);
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u64 xe_lrc_descriptor(struct xe_lrc *lrc);
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u32 xe_lrc_seqno_ggtt_addr(struct xe_lrc *lrc);
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struct dma_fence *xe_lrc_alloc_seqno_fence(void);
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void xe_lrc_free_seqno_fence(struct dma_fence *fence);
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void xe_lrc_init_seqno_fence(struct xe_lrc *lrc, struct dma_fence *fence);
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s32 xe_lrc_seqno(struct xe_lrc *lrc);
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u32 xe_lrc_start_seqno_ggtt_addr(struct xe_lrc *lrc);
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s32 xe_lrc_start_seqno(struct xe_lrc *lrc);
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u32 xe_lrc_parallel_ggtt_addr(struct xe_lrc *lrc);
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struct iosys_map xe_lrc_parallel_map(struct xe_lrc *lrc);
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size_t xe_lrc_skip_size(struct xe_device *xe);
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void xe_lrc_dump_default(struct drm_printer *p,
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struct xe_gt *gt,
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enum xe_engine_class);
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u32 *xe_lrc_emit_hwe_state_instructions(struct xe_exec_queue *q, u32 *cs);
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struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc);
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void xe_lrc_snapshot_capture_delayed(struct xe_lrc_snapshot *snapshot);
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void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer *p);
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void xe_lrc_snapshot_free(struct xe_lrc_snapshot *snapshot);
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u32 xe_lrc_ctx_timestamp_ggtt_addr(struct xe_lrc *lrc);
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u32 xe_lrc_ctx_timestamp_udw_ggtt_addr(struct xe_lrc *lrc);
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u64 xe_lrc_ctx_timestamp(struct xe_lrc *lrc);
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u32 xe_lrc_ctx_job_timestamp_ggtt_addr(struct xe_lrc *lrc);
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u32 xe_lrc_ctx_job_timestamp(struct xe_lrc *lrc);
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/**
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* xe_lrc_update_timestamp - readout LRC timestamp and update cached value
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* @lrc: logical ring context for this exec queue
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* @old_ts: pointer where to save the previous timestamp
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*
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* Read the current timestamp for this LRC and update the cached value. The
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* previous cached value is also returned in @old_ts so the caller can calculate
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* the delta between 2 updates. Note that this is not intended to be called from
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* any place, but just by the paths updating the drm client utilization.
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*
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* Returns the current LRC timestamp
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*/
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u64 xe_lrc_update_timestamp(struct xe_lrc *lrc, u64 *old_ts);
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#endif
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