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f0c06677d1
The key termination is done with a specific submission to the VCS engine. This flow will be triggered in response to a termination interrupt, whose handling is coming in a follow-up patch in the series. v2: clean up defines and command emission code. (John) Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250129174140.948829-4-daniele.ceraolospurio@intel.com
29 lines
798 B
C
29 lines
798 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2024 Intel Corporation
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*/
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#ifndef _XE_MFX_COMMANDS_H_
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#define _XE_MFX_COMMANDS_H_
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#include "instructions/xe_instr_defs.h"
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#define MFX_CMD_SUBTYPE REG_GENMASK(28, 27) /* A.K.A cmd pipe */
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#define MFX_CMD_OPCODE REG_GENMASK(26, 24)
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#define MFX_CMD_SUB_OPCODE REG_GENMASK(23, 16)
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#define MFX_FLAGS_AND_LEN REG_GENMASK(15, 0)
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#define XE_MFX_INSTR(subtype, op, sub_op) \
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(XE_INSTR_VIDEOPIPE | \
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REG_FIELD_PREP(MFX_CMD_SUBTYPE, subtype) | \
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REG_FIELD_PREP(MFX_CMD_OPCODE, op) | \
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REG_FIELD_PREP(MFX_CMD_SUB_OPCODE, sub_op))
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#define MFX_WAIT XE_MFX_INSTR(1, 0, 0)
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#define MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG REG_BIT(9)
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#define MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG REG_BIT(8)
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#define CRYPTO_KEY_EXCHANGE XE_MFX_INSTR(2, 6, 9)
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#endif
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