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3477696345
Introduces the capability to simulate hardware faults for testing purposes. The new `fail_hw` fault can be injected in `ivpu_hw_reg_poll_fld()`, which is used in various parts of the driver to wait for the hardware to reach a specific state. This allows to test failures during NPU boot and shutdown, IPC message handling and more. Fault injection can be enabled using debugfs or a module parameter. Reviewed-by: Maciej Falkowski <maciej.falkowski@linux.intel.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250129125636.1047413-2-jacek.lawrynowicz@linux.intel.com
134 lines
4.5 KiB
C
134 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2020-2023 Intel Corporation
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*/
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#ifndef __IVPU_HW_REG_IO_H__
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#define __IVPU_HW_REG_IO_H__
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#include <linux/bitfield.h>
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#include <linux/fault-inject.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include "ivpu_drv.h"
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#define REG_POLL_SLEEP_US 50
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#define REG_IO_ERROR 0xffffffff
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#define REGB_RD32(reg) ivpu_hw_reg_rd32(vdev, vdev->regb, (reg), #reg, __func__)
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#define REGB_RD64(reg) ivpu_hw_reg_rd64(vdev, vdev->regb, (reg), #reg, __func__)
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#define REGB_WR32(reg, val) ivpu_hw_reg_wr32(vdev, vdev->regb, (reg), (val), #reg, __func__)
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#define REGB_WR64(reg, val) ivpu_hw_reg_wr64(vdev, vdev->regb, (reg), (val), #reg, __func__)
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#define REGV_RD32(reg) ivpu_hw_reg_rd32(vdev, vdev->regv, (reg), #reg, __func__)
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#define REGV_RD64(reg) ivpu_hw_reg_rd64(vdev, vdev->regv, (reg), #reg, __func__)
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#define REGV_WR32(reg, val) ivpu_hw_reg_wr32(vdev, vdev->regv, (reg), (val), #reg, __func__)
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#define REGV_WR64(reg, val) ivpu_hw_reg_wr64(vdev, vdev->regv, (reg), (val), #reg, __func__)
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#define REGV_WR32I(reg, stride, index, val) \
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ivpu_hw_reg_wr32_index(vdev, vdev->regv, (reg), (stride), (index), (val), #reg, __func__)
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#define REG_FLD(REG, FLD) \
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(REG##_##FLD##_MASK)
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#define REG_FLD_NUM(REG, FLD, num) \
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FIELD_PREP(REG##_##FLD##_MASK, num)
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#define REG_GET_FLD(REG, FLD, val) \
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FIELD_GET(REG##_##FLD##_MASK, val)
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#define REG_CLR_FLD(REG, FLD, val) \
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((val) & ~(REG##_##FLD##_MASK))
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#define REG_SET_FLD(REG, FLD, val) \
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((val) | (REG##_##FLD##_MASK))
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#define REG_SET_FLD_NUM(REG, FLD, num, val) \
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(((val) & ~(REG##_##FLD##_MASK)) | FIELD_PREP(REG##_##FLD##_MASK, num))
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#define REG_TEST_FLD(REG, FLD, val) \
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((REG##_##FLD##_MASK) == ((val) & (REG##_##FLD##_MASK)))
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#define REG_TEST_FLD_NUM(REG, FLD, num, val) \
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((num) == FIELD_GET(REG##_##FLD##_MASK, val))
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#define REGB_POLL_FLD(reg, fld, exp_fld_val, timeout_us) \
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ivpu_hw_reg_poll_fld(vdev, vdev->regb, reg, reg##_##fld##_MASK, \
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FIELD_PREP(reg##_##fld##_MASK, exp_fld_val), timeout_us, \
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__func__, #reg, #fld)
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#define REGV_POLL_FLD(reg, fld, exp_fld_val, timeout_us) \
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ivpu_hw_reg_poll_fld(vdev, vdev->regv, reg, reg##_##fld##_MASK, \
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FIELD_PREP(reg##_##fld##_MASK, exp_fld_val), timeout_us, \
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__func__, #reg, #fld)
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extern struct fault_attr ivpu_hw_failure;
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static inline int __must_check
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ivpu_hw_reg_poll_fld(struct ivpu_device *vdev, void __iomem *base,
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u32 reg_offset, u32 reg_mask, u32 exp_masked_val, u32 timeout_us,
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const char *func_name, const char *reg_name, const char *fld_name)
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{
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u32 reg_val;
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int ret;
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ivpu_dbg(vdev, REG, "%s : %s (0x%08x) POLL %s started (exp_val 0x%x)\n",
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func_name, reg_name, reg_offset, fld_name, exp_masked_val);
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ret = read_poll_timeout(readl, reg_val, (reg_val & reg_mask) == exp_masked_val,
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REG_POLL_SLEEP_US, timeout_us, false, base + reg_offset);
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#ifdef CONFIG_FAULT_INJECTION
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if (should_fail(&ivpu_hw_failure, 1))
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ret = -ETIMEDOUT;
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#endif
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ivpu_dbg(vdev, REG, "%s : %s (0x%08x) POLL %s %s (reg_val 0x%08x)\n",
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func_name, reg_name, reg_offset, fld_name, ret ? "ETIMEDOUT" : "OK", reg_val);
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return ret;
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}
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static inline u32
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ivpu_hw_reg_rd32(struct ivpu_device *vdev, void __iomem *base, u32 reg,
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const char *name, const char *func)
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{
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u32 val = readl(base + reg);
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ivpu_dbg(vdev, REG, "%s : %s (0x%08x) RD: 0x%08x\n", func, name, reg, val);
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return val;
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}
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static inline u64
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ivpu_hw_reg_rd64(struct ivpu_device *vdev, void __iomem *base, u32 reg,
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const char *name, const char *func)
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{
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u64 val = readq(base + reg);
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ivpu_dbg(vdev, REG, "%s : %s (0x%08x) RD: 0x%016llx\n", func, name, reg, val);
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return val;
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}
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static inline void
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ivpu_hw_reg_wr32(struct ivpu_device *vdev, void __iomem *base, u32 reg, u32 val,
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const char *name, const char *func)
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{
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ivpu_dbg(vdev, REG, "%s : %s (0x%08x) WR: 0x%08x\n", func, name, reg, val);
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writel(val, base + reg);
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}
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static inline void
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ivpu_hw_reg_wr64(struct ivpu_device *vdev, void __iomem *base, u32 reg, u64 val,
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const char *name, const char *func)
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{
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ivpu_dbg(vdev, REG, "%s : %s (0x%08x) WR: 0x%016llx\n", func, name, reg, val);
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writeq(val, base + reg);
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}
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static inline void
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ivpu_hw_reg_wr32_index(struct ivpu_device *vdev, void __iomem *base, u32 reg,
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u32 stride, u32 index, u32 val, const char *name,
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const char *func)
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{
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reg += index * stride;
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ivpu_dbg(vdev, REG, "%s WR: %s_%d (0x%08x) <= 0x%08x\n", func, name, index, reg, val);
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writel(val, base + reg);
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}
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#endif /* __IVPU_HW_REG_IO_H__ */
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