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108a767798
replace newly added precise compatible with old one for existed clock device of CV18XX series SoCs. Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20250504104553.1447819-4-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
55 lines
1.2 KiB
Plaintext
55 lines
1.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
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*/
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#define SOC_PERIPHERAL_IRQ(nr) ((nr) + 16)
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#include <dt-bindings/pinctrl/pinctrl-cv1800b.h>
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#include "cv180x-cpus.dtsi"
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#include "cv180x.dtsi"
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/ {
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compatible = "sophgo,cv1800b";
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x4000000>;
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};
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soc {
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interrupt-parent = <&plic>;
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dma-noncoherent;
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pinctrl: pinctrl@3001000 {
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compatible = "sophgo,cv1800b-pinctrl";
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reg = <0x03001000 0x1000>,
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<0x05027000 0x1000>;
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reg-names = "sys", "rtc";
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};
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clk: clock-controller@3002000 {
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compatible = "sophgo,cv1800b-clk";
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reg = <0x03002000 0x1000>;
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clocks = <&osc>;
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#clock-cells = <1>;
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};
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plic: interrupt-controller@70000000 {
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compatible = "sophgo,cv1800b-plic", "thead,c900-plic";
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reg = <0x70000000 0x4000000>;
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interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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riscv,ndev = <101>;
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};
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clint: timer@74000000 {
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compatible = "sophgo,cv1800b-clint", "thead,c900-clint";
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reg = <0x74000000 0x10000>;
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interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
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};
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};
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};
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